Problem running MAX 10 - Single-Port Triple Speed Ethernet and On-Board PHY Chip Design Example
Hi, I tried to run the example (MAX 10 - Single-Port Triple Speed Ethernet and On-Board PHY Chip Design Example (intel.com)) on Quartus 18.0. When I generate HDL using Platform designer, I gotten the following error messages.
Error: qsys_top.aso_splitter_0: Component aso_splitter 1.0 not found or could not be instantiated
Error: qsys_top.error_adapter2_0: Component error_adapter2 1.0 not found or could not be instantiated
Error: qsys_top.eth_gen_0: Component eth_gen 1.0 not found or could not be instantiated
Error: qsys_top.eth_mon_0: Component eth_mon 1.0 not found or could not be instantiated
Error: qsys_top.st_mux_2_to_1_0: Component st_mux_2_to_1 1.0 not found or could not be instantiated
Can anyone point me to the fix for this error messages?