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Sathvika's avatar
Sathvika
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2 years ago

JTAG pin connections for MAX 10 FPGA

I am making a design using 10M08SAE144C8G.

Below is the schematic reference I am using .

https://www.intel.com/content/dam/support/us/en/programmable/support-resources/fpga-wiki/asset01/bemicro-max-10-schematic-a4-20141008.pdf

Here there is an embedded USB blaster design by default. But i dont want to use MAX V (CPLD) for it, instead I wasnt to use external USB blaster II. So the below is the jtag connector.

How the connections should go to FPGA pins. and what are things we need to take care while doing the schematic in the current file(schematic link above).

Can you please name the connection in terms of FPGA net names mentioned in the schematic like below.

Fpga Devkit

14 Replies

  • sstrell's avatar
    sstrell
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    2 years ago

    Use the legend in the Pin Planner to find the JTAG pins for your device and connect appropriately in your schematic.

    • Sathvika's avatar
      Sathvika
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      2 years ago

      Sorry, I didn't get you. What legend in the pin planner you mean?

  • sstrell's avatar
    sstrell
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    2 years ago

    In the Pin Planner, choose to view the Legend from the View menu. This explains all the symbols and colors on the pins, including highlighting the JTAG pins, so you can find the pins for your device. You can also download pin files from the Intel web site, but I find it easier to see them directly in Pin Planner.

    • Sathvika's avatar
      Sathvika
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      2 years ago

      I am not sure, where this pin planner and legend if at. Maybe it is in different software.

      I am using altium to design the board.

      Below is the jtag connector header.

      I am confused in connecting these JTAG J161A nd J161B pins to which pins of FPGA(10M08SAE144C8G).

      Please help me with just these 10 connections of JTAG.

      • sstrell's avatar
        sstrell
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        2 years ago
        In Quartus, use the Pin Planner from the Assignments menu.
  • FvM's avatar
    FvM
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    2 years ago

    Hi,
    pin planner shows only JTAG signal pins, GND and VCC need to be also connected. For complete wiring of programming connector,
    refer to MAX10 Device Handbook.

    Additional pins are dedicated for AS memory programming, which has no function for MAX10.

    • Sathvika's avatar
      Sathvika
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      2 years ago

      What is AS?

      And it is ok if we just use 4 pins from JTAG and connect them to FPGA. And leave remaining pins unconnected?

      • FvM's avatar
        FvM
        Icon for Super Contributor rankSuper Contributor
        2 years ago
        AS is active serial flash, used e.g. with Cyclone 10.

        4 JTAG pins + GND + VCC
  • NurAiman_M_Intel's avatar
    NurAiman_M_Intel
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    2 years ago

    We do not receive any response from you to the previous answer that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you