F2SDRAM : mSGDMA endian issue and SDRAM reading/writing issue
Hi
I'm working on CycloneVsoc Dev Kit baremetal system
Now I want to use F2H sdram to transmit my data.
The draft system Interconnection:
HPS host master
|
| host order
|
SelfIP write -------ST----------| SGDMA |--------MM-------------> SDRAM
SelfIP read <-------ST---------| SGDMA |--------MM------------- SDRAM
do I need to transfer the Endian for the SGDMA?
or is there any setting to let avalon ST using little endian?
As for HPS,
HPS view of mmap is MPU one, so the address of SDRAM is from 0x00100000 to 0xC0000000, according to HPS UG,
is that the physical address or vertual one?
what is this SDRAM stands for ,? Is it the ddr3 chip on this board?
If it is, is that the place where my codes are?
how should I put/get data to sdram within and beyond this scope from HPS?
CycloneVsoc address map
Reguards
Alex