Cyclone 10GX with 2 port SFP 1G test.

Hi,

Is the problem only happen in your custom board, where there C10 GX development board is working fine?

Do both channels pass the TEST_SMA_LB test?

Hi SengKok! My team has build a project ping test success from Computer/Bercut <-> RJ45 caple <-> 88E1111<-> SGMIII<-> TSE IP. Can you help me change to project test to Computer/Bercut <-> SFP Caple <-> SFP 1G module<-> XCVR<-> TSE IP? Thank so much! My project test is below. https://drive.google.com/file/d/1aZt2EIvVLVoqDmtknu724jLimWsUk57V/view?usp=sharing

The following TSE design example may be helpful for your design migration:

https://fpgacloud.intel.com/devstore/platform/15.0.0/Standard/an744-scalable-triple-speed-ethernet-reference-designs-for-arria-10-devices/

https://fpgacloud.intel.com/devstore/platform/15.0.0/Standard/an647-single-port-triple-speed-ethernet-and-on-board-phy-chip-reference-design-arria-10/

Regards -SK

Hi SengKok. I have been tried "AN744: Scalable Triple Speed Ethernet Reference Designs for Arria 10 Devices" but projet not ran in TEST_1588 0 1 1G test in above. In project "Single-Port Triple-Speed Ethernet and On-Board PHY Chip Reference Design - Arria 10 " TSE run in SGMII interface with 88e1111. But I need interface with SFP port.

If the SMA loopback on channel 0 is passing, then please focus on your hardware setup first.

TEST_SMA_LOOPBACK 0 1G 1000

Please check if the channel 0 SFP loopback is passing.

TEST_1588 0 0 1G

I can't sucess this test. I'm not sure that the Cyclone 10gx supports 1G SFP communication or I have misconfigured IPCore TSE. Can you help me try the above example on a Cyclone10gx kit. If that fails I fear that having to switch to using Xilinx IC:

You can follow the AN744 TSE IP core configuration for the settings. What you need to do is basically enable the GXB interface and then hook up with a reset controller. Please refer to the altera_eth_channel.v file.

Does the PHY internal serial loopback test is passed (TEST_PHYSERIAL_LOOPBACK 0 1G 1000), if yes, which means the TSE IP configuration and connection are fine.

Next, please confirm if SMA loopback or SFP loopback is passing on the same channel. If not, please capture the following signals for debugging:

1. led_an
2. led_link
3. pll_locked
4. tse_reset
5. rx_ready
6. tx_ready
7. rx_is_lockedtodata
8. rx_is_lockedtoref

XCVR and TSE ping tests ran in Cyclone 10GX KIT but not ran in my custom board. Can you tell me why and how to fix the above problem to work properly XCVR? VCCT_GXB = VCCR_GXB = 1.03V; VCCH_GXB = 1.8V and all signal TX and RX same in both my wide KIT and custom DEV.

What is the difference between the dev kit and your custom board? Is your custom board passed the internal loopback test?