Proper PERST# connection for FMC on Agilex5 Modular Development Kit

I am using an Agilex5 Modular Development Kit to implement a design that has two PCIe endpoints. Each endpoint would run at the same x4 configuration (start with Gen3 and maybe move to Gen4). The first endpoint is easy as the board supports it natively.

For the second endpoint I am planning to use the Terrasic P16E-FMCP board and use a separate adapter to limit the width to x4. I went through the schematic several times and I am fairly confident that FMC PCIe lanes 0-3 (plus the reference clock) would connect to the transceiver bank 1B on the Agilex5 device. So the high speed signals look to be OK.

My issue is with how to achieve a proper PERST connection. The FMC board connects the PERST# signal to the FMC RES0 pin which is not connected on the Agilex board. This means I have to make a manual connection to the appropriate pins on the FPGA device. Assuming that my bank 1B analysis is correct then the possible PERST# pin connections are:

• CF132
  • net A5E_HVIO_5A_6
  • IO_D61 pin on the primary board-to-board connector
  • Carrier board: net MIPI_XHS0_1V8 which is floating if there is nothing plugged to the MIPI connector
  • Manual PERST connection: Level shift the PERST signal down to 1.8V and then solder it to the MIPI_XHS0_1V8 net.
• BU109
  • net A5E_HVIO_5B_6
  • IO_A56 pin on the primary board-to-board connector
  • Carrier board: BMC_UART_RX0_I2C_SCL_3V3 which is connected to the MAX10 device
  • Manual PERST connection not possible 

Before I do the board modification, I would like to confirm my analysis is correct (maybe 1B is not the correct bank) and that I am not missing some other, easier, connection.

Thank you very much in advance. Any help is greatly appreciated