39 Results
Incorrect values from TX-Fifo in Avalon PCIe Example
The endpoint TX-Fifo from the Avalon-ST Chaining DMA PCIe example outputs an incorrect tx_st_eop signal. During a signal tap II analysis of the Chaining DMA example, I noticed that the tx_st_eop r...Solvedaltpcierd_cdma_ast_tx_64.v2.5KViews0likes9CommentsQuartus Prime Lite Edition - Setting File Reference Manual &&& weak pull-up
Dear Manager, I'm using Quartus Prime Lite Editon 18.0.0 version to develop MAX V CPLD. I want set the un-used pin to weak pull-up. Please let me know where can I find the "Quartus Prime Lite Edit...Solved18KViews0likes5CommentsEP2S60F672C3 (Leaded version) vs EP2S60F672C3N (Lead-Free version)
...xactly the same in the specs or functionality. I have been looking in the datasheet but they do not specify anything related to the "N" suffix. Thank you, Edgar Gutierrez.SolvedStratix_II_Device_Handbook_Apr2011.pdf7.9KViews0likes3CommentsPorting design to T0117 from XpressGX5LP-HE, both with 5SGXEA7K2F40C2N
I am looking to port a design to the T0117 from the XpressGX5LP-HE. Both have the 5SGXEA7K2F40C2N chip. I understand the pins are different and I will need to re-assign them appropriately, but are th...XpressGX5LP HE_Reference_Manual.pdf, T0117.pdf2.3KViews0likes5Comments