Forum Discussion
The problem has been solved. The root cause turned out to be a version mismatch in my system's path environments. I had originally been working on Quartus 26.1 and subsequently moved to version 24.3 to align perfectly with the official Terasic GHRD. However, when I downgraded, my environment variables did not update to reflect the change. Consequently, whenever I ran any scripts or batch files, they were still executing using the 26.1 toolchain in the background. This silent version mixing corrupted the workflow and caused the Synchronous Abort during the main U-Boot phase.
Thankfully, after correcting the environment variables to point strictly to the 24.3 installation, the workflow completes successfully and the board boots into Linux.
However, I am now facing a secondary configuration issue. After the system boots, I cannot access or use any bus (including the lwhps2fpga bus) by default. The only way I can interact with the custom logic is if I interrupt the boot sequence, drop into the U-Boot bash shell, and manually execute the bridge enable command.
Could anyone explain why the AXI bridges are remaining disabled by default after configuration? What is the recommended method or required modification to the environment so that U-Boot or Linux automatically enables these bridges during the standard boot flow
Hi Motaz_sami,
Thanks for posting your solution. That is super helpful to the community.
Please review these examples:
https://github.com/altera-fpga/agilex5-demo-hps2fpga-interfaces/blob/main/documentation/01_index.md
There are a couple in there that enable the bridges.
Sue
- JamesG_Altera8 days ago
New Contributor
Hi Motaz_sami,
Were you able to review the examples that Sue provided? Have you been able to make progress with the bridges?
Best Regards,
James Grant