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IOzan's avatar
IOzan
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3 hours ago

Preloader/U-Boot Compilation Failure

General Background: 

I'm working with a custom board that has an Altera/Intel Cyclone V, SoC FPGA (5CSEBA6U23, similar to the DE10-Nano development kit). The board is already equipped with all the necessary files for a successful boot sequence from a uSD card (FPGA and the ARM processor (HPS)).

The Objective:

I want to reconfigure the HPS functionality (Mux) for pins 53 and 54 from their current GPIO to CAN BUS. I need to ensure a successful boot from the uSD card with the updated hardware definition and Device Tree.

Issue Description: Preloader/U-Boot Compilation Failure

After successfully implementing the changes in Quartus and Platform Designer and after successfully generating the BSP files (bsp-editor), I'm attempting to run the "make" command to build the Preloader/U-Boot image. The process starts and creates the uboot-socfpga directory, but the compilation consistently fails with several errors, and the final boot image is not updated.

Extension of the successfully completed steps:

  1. I've modified the Platform Designer (Qsys) mux functionality to reconfigure the HPS peripheral pins (GPIO53-GPIO54) for CAN BUS functionality.
  2. I've integrated the new HPS component into the top-level VHDL project.
  3. I've Generate a full VHDL compilation in Quartus.
  4. Using the "SoC EDS Command Shell", I launched the BSP-Editor and loaded the updated "settings.bsp" file. After generation, the "hps_isw_handoff" and "generated" directories were updated.
  5. I have manually verified the output files (pinmux_config.h) to confirms that CAN1 is now correctly configured in the pin multiplexing settings.

What should I do?  

 

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