Forum Discussion
Occasional ContributorSDRAM calibration failed.
Hello,
after Enpirion stopped selling some of the parts we used on our board, we had to redesign it. We assembled ten boards, and on two of them, I’m now getting an SDRAM calibration error in U-Boot.
I’d like to enable the SDRAM calibration report to understand the cause of the error. However, the described method of adding.
#define RUNTIME_CAL_REPORT 1
in the sequencer_defines.h file didn’t work. I generated the files using the QTS filter script, but there was no change.
Could you please tell me how to properly enable the SDRAM calibration report so I can debug the issue?
12 Replies
qwitzahello Archer_Altera,
I’ll give the new U-Boot version a try,
maybe I’ll be able to get the debug output.
I’ll test it and report back with the results in two or three days.thanks
SueC_AlteraContributor
- qwitza
Hello,
sorry for the missing information.
Device: Cyclone V
Quartus: 21.1 / 24.1
u-boot: v2020.01
Archer_AlteraHi @qwita,
Is it convenient for your design to upgrade uboot version to 2024.07 or later? This will be helpful for me to investigate this case and support you. It will be benefit for you to get support in later development process.
If it is not convenient, I will try to help you with uboot 2020.01 version.
For both ways, please give me some time to run on hardware to find the correct method.
By the way, latest uboot, linux guidance document for cyclone V device is posted on link below.
Regards,
Archer_Altera
- Archer_Altera
Hello qwitza,
Can you let me know which uboot version you prefer to use? I will try to find the solution on it.
Regards,
Archer_Altera
- qwitza
Hello,
for testing purposes, I used the quick method and selected the socfpga_cyclone5_defconfig. Before that, I included our QTS files using the Python script. The result:U-Boot SPL 2025.07-g35abb4f1cedc-dirty (Nov 11 2025 - 07:52:35 +0100)
SDRAM calibration failed.
### ERROR ### Please RESET the board ###But still no debug information :-(
- qwitza
Hello,
now i am an step further.
my steps:
- #define LOG_DEBUG in sdram_gen5.c
- #define DLEVEL 1 in sequencer.cnow i get an error result. see my next post.
- qwitza
here, is the file
- Archer_Altera
Hi qwitza
Thanks for uploading the error log.
The function test_load_patterns(0, ALL) returned 170, but the expected value was 255.
This indicates that the test pattern written to DDR (typically 0xFF) was read back as 0xAA (i.e., 170).
Since 0xAA is 0b10101010 and 0xFF is 0b11111111, this suggests that certain DQ bits are stuck at 0. Since only two boards have this issue, it is most likely hardware issue such as DQ pin connectivity issues (open circuit, short circuit, or poor soldering).
Hope this is helpful.
Archer_Altera
- qwitza
Hi Archer_Altera ,
thanks a lot for your reply and the great support!
Today I measured all the DQ pins, and on both boards I found two lines with higher impedance. We’ll X-ray the boards to check the connections — maybe you’re right :-)
I’ll post the results here once we have them.
Thanks again!- KianHinT_altera
Frequent Contributor
Hi qwitza ,
Just checking up on this case status? Any pending issues or already found the cause on the 2 boards not working, otherwise we would like to transition this to closure and transition this thread to community discussion.
Thanks
Regards
Kian
- BrianSune_Froum
qwitza
I encounter the same issue.All previous mainstream U-Boot and Altera U-Boot working properly.
But just pull to newer U-Boot that tedious message print.
However keep reset manually via master reset button can trigger a normal boot.
So it must be s.t. messed up on patches.
No it is not about the device issue, it is U-Boot software issue.
Brian
