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SATC's avatar
SATC
Icon for Occasional Contributor rankOccasional Contributor
6 years ago
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Unavailable to Create CvP File at Convert Programming File at Intel Quartus Prime Pro 19.3 version

I'm using the Intel® Cyclone® 10 GX CvP Initialization over PCI Express User, so i'm set the ProgrammingFile Type as JTAG Indirect Configuration File (.jic), but when i choose the configuration device as Cyclone 10 family is not found the EPCQL1024. But when i change the family device to Arria the EPCQL is availabel. Why does this happen?

But even with the EPCQL1024 selected the option to create CvP Files is unavailable. 3 figures are attached to illustrate the situation.

Figure 1

Figure 2

Figure 3

  • JohnT_Altera's avatar
    JohnT_Altera
    6 years ago

    Hi,

    Do you enable the CvP in your PCIe IP setting? Could you share with me your sof file?

7 Replies

  • JohnT_Altera's avatar
    JohnT_Altera
    Icon for Regular Contributor rankRegular Contributor
    6 years ago

    Hi.

    1st question on selecting EPCQL device for Cyclone 10 GX FPGA. This looks like a bug on Quartus 19.3 Pro Edition. This issue will be fixed in the next Quartus released. You can either select EPCQL with Arria 10 as the device or use Quartus 19.2.

    For 2nd Question related to generating split perphi.jic and rbf file, you will need to add the sof file which has the the CvP initialization enabled before the "Create CvP File" is available to be enabled. This is to protect from accidentally enable and Quartus convert programming file generate error when user tried to convert it even if the sof file does not have CvP initialization enabled. Please let me know if you are still seeing the issue after adding the sof file into the Convert Programming File GUI.

    • SATC's avatar
      SATC
      Icon for Occasional Contributor rankOccasional Contributor
      6 years ago

      even adding the .sof file the error persists

  • JohnT_Altera's avatar
    JohnT_Altera
    Icon for Regular Contributor rankRegular Contributor
    6 years ago

    Hi,

    May I know if the generated sof file is with the CvP Initialization Enabled? May I know if you are able to share with me your sof file?

  • SATC's avatar
    SATC
    Icon for Occasional Contributor rankOccasional Contributor
    6 years ago

    The .sof file is generated by the project compilation, the CvP initialization is unavailable as in the last Figure.

  • JohnT_Altera's avatar
    JohnT_Altera
    Icon for Regular Contributor rankRegular Contributor
    6 years ago

    Hi,

    May I know when you compile your project, is the CvP Initialization is enabled?

  • JohnT_Altera's avatar
    JohnT_Altera
    Icon for Regular Contributor rankRegular Contributor
    6 years ago

    Hi,

    Do you enable the CvP in your PCIe IP setting? Could you share with me your sof file?