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PixelPusher's avatar
PixelPusher
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2 months ago

Is there any way to script the creation of a signal tap instance?

I have been trying to see if it is possible to create a signal tap instance using a scripted approach. For example, create an instance, add some signals from the design using wildcards, setup triggers etc. But I can't seem to find an API for this - does it exist?

I have seen that there are scripting APIs for interacting to an existing running signal tap instance, but that isn't what I'm looking for.

I could script the creation of a "signal tap logic analyser" IP instance and then instantiate that in HDL code in my design. However that seems quite heavy - adding it do different parts of the design becomes cumbersome and I don't want to keep them in my codebase.

The use case is I want to have a collection of debugging nodes that I can conditionally insert and quickly change the configuration of, without cluttering my main RTL.

Thanks!

5 Replies

  • sstrell's avatar
    sstrell
    Icon for Super Contributor rankSuper Contributor

    You may want to look at a block-based design approach, creating reusable design partitions that include Signal Tap instances.  There's a user guide all about doing this in Pro: 

    https://docs.altera.com/r/docs/683247/current

  • KennyT_altera's avatar
    KennyT_altera
    Icon for Super Contributor rankSuper Contributor

    No, there is no documented public API to script creation of a Signal Tap instance itself, such as creating an STP, adding signals by wildcard, or defining triggers from scratch.

    Sstrell provide the right recommended approach in Quartus Pro, which is block-based design using design partitions. You can keep debug logic in a separate partition and use partition reuse / empty partitions to include or remove it without cluttering the main RTL.

  • Thanks for the suggestion.

    I have looked at the user guide and example designs for block design with signal tap. Is this the flow you meant?

    • Create a design partition around the piece of logic you want to debug
    • Use the CREATE_PARTITION_BOUNDARY_PORTS qsf assignment to select ports you want to export, which could be nested deep in the partition hierarchy
    • Connect signal tap:
      • Create a signal tap instance in the UI and connect to the exported nodes OR 
      • Create a signal tap HDL instance and connect it to the ports of partition, then generate an stp file from `quartus_stp top --create_signaltap_hdl_file` ...

    Or are you referring to creating signal tap instances within a separate design partitions to the logic you want to debug, and then conditionally including those design partitions?

    I am trying to avoid using the GUI to create the signal tap files, because it's slow and harder to share with coworkers, recreate and source control etc. Perhaps there is a route forward with CREATE_PARTITION_BOUNDARY_PORTS alongside using the signal tap HDL instance. Is that a workflow you recommend?

  • sstrell's avatar
    sstrell
    Icon for Super Contributor rankSuper Contributor

    The latter: put Signal Tap in a reusable design block and make multiple design blocks that you can basically just swap in and out.

    As mentioned, you can't set up the .stp file without using the GUI.

  • What are the benefits of that? Improved compilation speed?

    I can selectively include different .stp in the project which I think achieves the same thing?