SSLC Login Issue – "You need to enroll" loop after OTP verification
Hi, I am facing an issue with the Altera Self Service Licensing Center (SSLC). Problem: - I enrolled at licensing.altera.com successfully - I receive the OTP verification code on my email - After entering the OTP correctly, it shows: "Access to the SSLC portal requires registration Register here to get started." - This creates an infinite loop and I cannot access the portal at all I need to generate a free Questa Intel FPGA Starter Edition (SW-QUESTA) license for use with Quartus Prime Lite 24.1. Things I already tried: - Enrolled with two different email IDs - Tried Chrome, Edge, and Incognito mode - Cleared cookies and cache. Could you please either: 1. Fix my account access, OR 2. Manually generate and send the license.dat file to my email My registered email: [email protected] Thank you.
quartus pro 25.3 bug?
Now I am developing a project with agilex7 base on the quartus pro 25.3. the project contains R-TILE pcie hard ip and F-tile ethernet hard ip. During board bring-up debugging, we frequently encounter non-deterministic discrepancies between actual hardware behavior and simulation results. For instance, on a certain platform, the PCIe device fails to be enumerated by the host. Probing the Avalon-ST TX interface of the PCIe hard IP reveals continuous toggling on both the hvld and dvalid signals. However, we have verified that no traffic is being sourced to this interface, meaning these two signals should theoretically remain idle without constant toggling. And the timing of the project is cleaning. How should we proceed to troubleshoot this issue? Should we try upgrading the Quartus version as a potential solution?
A5EG013BB18A OPN is visible in Quartus but not listed in Program File Generator
Hi everyone, I am currently working on programming an SCM FPGA board using Intel Quartus 25.1 . Our target FPGA OPN is A5EG013BB18A. I need to generate a .jic file from a .sof file by using the Program File Generator. However, when I try to select the FPGA Device in the Program File Generator, we cannot find A5EG013BB18A in the device list. The strange thing is that A5EG013BB18A can be seen in other places within Quartus, but it is not shown only in the Program File Generator device selection list. I have attached screenshots and related files showing: 1. The device can be seen in Quartus 2. The Program File Generator FPGA Device selection list 3. The content of .ini file and the .qsf file Could anyone help confirm the following? Is A5EG013BB18A supported in the Program File Generator? 2. Is there any specific .ini file setting or placement required for the Program File Generator to show this OPN? 3. Is a specific Quartus version or device package required? 4. Is there any known limitation where an OPN is visible in Quartus but not available in the Program File Generator? Any advice or reference would be appreciated. Thank you.
How to create a Packaged Subsystem in TCL
I am hoping to create a script which will automatically package the IP I am working on as a packaged subsystem. So far, I have automated the creation of an IP directory which describes a new component using a _hw.tcl file and the various source files. I believe the next step is to take this component, instantiate it in a Platform Designer system, and create a Packaged Subsystem using it. I am also hoping that I can parameterise and hide/modify ports of the packaged subsystem, like I can with the _hw.tcl component description. I am encountering a problem; I am running the following command: qsys-script --script=create_packaged_subsystem.tcl --new-quartus-project=my_project_name However, the script fails for the following reason: Error: invalid command name "set_package_property" Here is the script itself (more or less a copy-and-paste from the GUI): package require -exact qsys 26.1 set_package_property NAME "packagename" set_package_property DISPLAY_NAME "PackageName" set_package_property VERSION "1.0" set_package_property GROUP "GroupName" set_package_property DESCRIPTION "A descripton." set_package_property ELABORATION_CALLBACK elaboration_callback set_package_property EXTRACTION_CALLBACK extraction_callback add_fileset synth_fileset QUARTUS_SYNTH fileset_callback "Quartus Synthesis Fileset" add_fileset sim_verilog_fileset SIM_VERILOG fileset_callback "Simulation Verilog Fileset" proc elaboration_callback {} { enable_all_instances } proc extraction_callback {} { extract_modules } proc fileset_callback { output_name } { generate_all_instances } Any help would be hugely appreciated, on this issue and on my general workflow. Also if it is possible to encrypt packaged subsystems or components using Quartus I'd be keen to know. Thanks!
USB Blaster II Problem
Hello, I’m having a persistent issue with my USB-Blaster II programmer. No matter what I try, the programmer is detected only as a USB-Blaster variant, without the TCK speed option, and it does not work ... Occasionally, I can get it working by removing the installed driver and reinstalling it. However, after unplugging the programmer or restarting the computer, it reverts back to being detected as the USB-Blaster variant. Then I have to repeat the process: remove the driver, reinstall it, restart the JTAG server, or sometimes restart the whole computer. Even when it works, it only lasts for a single session. I have tried several Quartus Programmer versions, but the issue remains the same. The strange part is that I do not have this problem on my personal laptop or on my colleagues’ computers, so it seems specific to this machine. IT Helpdesk was also was not able to solve this problem Has anyone encountered this issue before or found the root cause? This is especially frustrating because I need to program a Cyclone GX device, and other programmers do not work for this use case. Any suggestions would be appreciated. Thank you!
