When I keep the ILA windows under Linux (redhat) while doing a new full place and route to get new probes, using the Ethernet blaster II, when Quartus has finished the tasks (fitter, ..), Quartus GUI is not responding, no graphics refresh at all. I'm obliged to bkill quartus, re-open it and re-open the .stp to capture new traces with the ILA. Could you check if there is a bug in that area? Quartus II 21.1.0 STD Alex.

Do you see any error message or Internal Error window pop up? It will be hard to pinpoint the issue that you are facing. Does you see this issue with a specific design? Does the Quartus tool compile successfully before? Have you try to run it in a different machine? Have you check that your OS version support the Quartus software? https://www.intel.com/content/www/us/en/support/programmable/support-resources/design-software/os-support.htmlBest Regards,Richard Tan

No error message, everything is frozen. No problem when I close the ILA windows before place and route is over. Well, If I open the ILA (.stp) after the place and route is over, the busy circle runs forever. So I can only use the ILA by closing Quartus , re open the project and re open the ILA.

I can see that there was a kind of similar issue in the past, not sure if this is still somewhat related or not: https://www.intel.ca/content/www/ca/en/support/programmable/articles/000079443.html Description Due to a problem in the Quartus® II software version 12.0 SP2 and earlier, the Quartus II GUI may freeze when adding signals in the SignalTap™ II Logic Analyzer if your quartus2.qreg file contains an invalid statement. Resolution To work around this problem, open quartus2.qreg and remove any lines that contain the text "Node_finder". The quartus2.qreg file can be found in the following location: Windows 7: C:\users\<username> Windows XP: C:\Documents and Settings\<username> Linux: ~/.altera.quartus This problem is fixed beginning with the Quartus II software version 12.1.

Is ILA the Integrated Logic Analyzer from Xilinx? If so, this is my first time seeing a customer using Quartus with ILA. Any reason why you want to use ILA instead of our Signal tap logic analyzer? p/s: the KDB is not applicable as the Quartus impacted is old version.

I mean't signal tap (for internal logic analyzer). I did use ILA on Xilinx too for a Xilinx FPGA. In this case this is an Altera cyclone V FPGA so I use Quartus/signal tap.

Quartus II 21.1.0 STD and ILA opened windows freezes GUI on LINUX at end of fitter.

18 Replies

RichardT_altera
Super Contributor
3 years ago
Do you see any error message or Internal Error window pop up? It will be hard to pinpoint the issue that you are facing.

Does you see this issue with a specific design? Does the Quartus tool compile successfully before?

Have you try to run it in a different machine?

Have you check that your OS version support the Quartus software?
https://www.intel.com/content/www/us/en/support/programmable/support-resources/design-software/os-support.html

Best Regards,
Richard Tan
- AEsqu
  Contributor
  3 years ago
  No error message, everything is frozen.
  
  No problem when I close the ILA windows before place and route is over.
  
  Well, If I open the ILA (.stp) after the place and route is over, the busy circle runs forever.
  
  So I can only use the ILA by closing Quartus , re open the project and re open the ILA.
AEsqu
Contributor
3 years ago
I can see that there was a kind of similar issue in the past, not sure if this is still somewhat related or not:

https://www.intel.ca/content/www/ca/en/support/programmable/articles/000079443.html

Description Due to a problem in the Quartus® II software version 12.0 SP2 and earlier, the Quartus II GUI may freeze when adding signals in the SignalTap™ II Logic Analyzer if your quartus2.qreg file contains an invalid statement.

Resolution
To work around this problem, open quartus2.qreg and remove any lines that contain the text "Node_finder". The quartus2.qreg file can be found in the following location:

Windows 7: C:\users\<username>

Windows XP: C:\Documents and Settings\<username>

Linux: ~/.altera.quartus

This problem is fixed beginning with the Quartus II software version 12.1.
RichardT_altera
Super Contributor
3 years ago
Is ILA the Integrated Logic Analyzer from Xilinx?

If so, this is my first time seeing a customer using Quartus with ILA.

Any reason why you want to use ILA instead of our Signal tap logic analyzer?

p/s: the KDB is not applicable as the Quartus impacted is old version.
AEsqu
Contributor
3 years ago
I mean't signal tap (for internal logic analyzer). I did use ILA on Xilinx too for a Xilinx FPGA.

In this case this is an Altera cyclone V FPGA so I use Quartus/signal tap.
RichardT_altera
Super Contributor
3 years ago
I am quite stump as to why the GUI hang.
Does this issue occur with a specific design?
If run the same design by using different machine (with higher RAM), will the issue re-occur?
- AEsqu
  Contributor
  3 years ago
  We have machines with huge amount of RAM.
  
  The issue happens with big design in the VQM from Synplify.
  
  If the VQM is big but code get's optimized away (tie clk/rst), then Quartus is fine with Signal tap (only top level remains, 5% usage or so of the FPGA).
AEsqu
Contributor
3 years ago
Edit: I also freeze with a small design when trying to move a waveform or change recompile condition.

I'm wondering if closing the two bottom windows (to gain waveform display space) is not helping reproducing the crash.
RichardT_altera
Super Contributor
3 years ago
Hi,

Could you share the design so I could try to duplicate it from my side?
The small design will do.

Best Regards,
Richard Tan
- AEsqu
  Contributor
  3 years ago
  Hi Richard,
  
  I cannot share my design.
  
  Alex.
RichardT_altera
Super Contributor
3 years ago
I tried on both Window 10 and Linux (RHEL) but unfortunately not able to duplicate the issue, with both Quartus and signal tap GUI open & compile at the same time.

ps: I tried using the simple design example below. Example_ISSP_SignalTap.qar, in case this is design dependent issue and you may try to duplicate from your side.
https://learning.intel.com/developer/learn/course/938/university-self-guided-lab-introduction-to-simulation-and-debug-of-fpgas

Unfortunately without a way to duplicate the issue, I am not able to further debug. Unless you can give me some pointer to duplicate the issue, else we can only hope someone from the community who comes across similar issue may have some answer.

Best Regards,
Richard Tan
- AEsqu
  Contributor
  3 years ago
  Please try with a big design at your side (that uses at least 70% of the FPGA for example).
  
  I don't have access to your example:
  
  403
  
  FORBIDDEN
  
  You don't have permission to access this page due to system time out or privacy restrictions. Please refresh your browser to confirm log-in credentials. Contact System Administrator if access issues persist.
  
  2022-06-28 13:34:49 | Error 403 | https://learning.intel.com/Developer
RichardT_altera
Super Contributor
3 years ago
Try this link to the training course:
https://www.intel.sg/content/www/xa/en/support/programmable/support-resources/fpga-training/catalog.html?s=Relevancy&countrylabel=Asia%20Pacific&q=university-self-guided-lab-introduction-to-simulation-and-debug-of-fpgas
- AEsqu
  Contributor
  3 years ago
  Does not seems to be downloadable from that place either.
AEsqu
Contributor
3 years ago
I moved to Quartus 13.1.0162 as I work again on the STRATIX III FPGA.

When I create the .stp and the .sof under Linux with Quartus 13.1

and then loading the .stp and programming the .sof using Quartus Prime 21.1 Standard Edition under Windows 10 ( I use the USB blaster at the moment, so I need to do it locally),

an error crash report windows always popup after loading a second time the .stp (after I modified the .sof/.stp under linux).

I installed Quartus II 13.1 (64-bit) pay edition under windows 10 and then there is no crash anymore.

So the bug lies in the Quartus 21.1 under linux and windows as for the .stp loading area.