Forum Discussion
I tried on both Window 10 and Linux (RHEL) but unfortunately not able to duplicate the issue, with both Quartus and signal tap GUI open & compile at the same time.
ps: I tried using the simple design example below. Example_ISSP_SignalTap.qar, in case this is design dependent issue and you may try to duplicate from your side.
Unfortunately without a way to duplicate the issue, I am not able to further debug. Unless you can give me some pointer to duplicate the issue, else we can only hope someone from the community who comes across similar issue may have some answer.
Best Regards,
Richard Tan
- AEsqu3 years ago
Contributor
Please try with a big design at your side (that uses at least 70% of the FPGA for example).
I don't have access to your example:
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