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KennyT_altera's avatar
KennyT_altera
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9 months ago

Quartus 20.1std compilation fails for Quartus map - Device 10AS057K2F40I1SG

Hi Chandu sri, 

We will continue the discussion here.

Issue
Chandu Sri is facing compilation errors in Quartus when working with the Arria 10 device (10AS057K2F40I1SG/10AS057K2F40I1HG) and HPS IP, both in Quartus Standard and Pro editions (20.1std, 24.1Std, 25.1.1pro).

  • Errors include unsupported device messages, out-of-range configuration values, and Tcl script issues when generating the HPS IP core.
  • The Arria 10 device is flagged as deprecated in the Standard version; IP core generation fails in Pro edition as well.
  • Example design generation is disabled for krpi_pcie.qsys; krpi_hps.qsys IP core creation fails with multiple errors.

Actions Taken

  • Device was changed from 10AS057K2F40I1SG to 10AS057K2F40I1HG, but errors persist.
  • Attempted manual recreation of the IP cores in 25.1.1pro instead of upgrading legacy designs.
  • Provided .qar file and detailed error logs to Intel support for further analysis.

Next Steps / Recommendations

  • Intel support (Kenny) has requested the .qar file for investigation.
  • Suggested complete deletion and manual re-creation of the problematic HPS IP in Platform Designer.
  • Discussion may continue on the Intel community forum if needed.

 

Compilation

34 Replies

  • RichardT_altera's avatar
    RichardT_altera
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    9 months ago

    As of Quartus Prime Standard Edition Version 22.1std.2, support for Arria 10 devices is deprecated in Quartus Prime Standard Edition.
    I would recommend to use Quartus Pro if plan to upgrade to a later Quartus version.

    I checked your design In Quartus Pro 25.1.1 and noticed there is a krpi_hps.qsys with generation error message stating that it need to be connected to a clock and reset sources. 
     
    Could you confirm the design provided able to duplicate the error?  Where and how does the error occur?
    Is it during the Quartus compilation or the Platform Designer generation? 
    More details is required.

    Thank you.  

    Regards,
    Richard Tan
     

  • chandu_sri's avatar
    chandu_sri
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    9 months ago

    Hi kenny,

    could you try .qar files shared on Intel community forum. we are having urgent requirement of this upgrade. 

    Thanks,

    Chandu sri

  • chandu_sri's avatar
    chandu_sri
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    9 months ago

    Hi Richard,

    The error is seen in Platform Designer for HPS IP core creation in 25.1.1pro version. I have shared the error message and .qar file on Intel forum. attaching the same here.

     

  • RichardT_altera's avatar
    RichardT_altera
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    9 months ago

    Kevin has provided me with a working design that can reproduce the fatal error in Quartus Standard 25.1.
    I am trying to upgrade the design to Quartus Pro 25.1, but the IP upgrade process is taking a long time.
    Do you have the .qar file for the Quartus Pro version that I can run?

    Regards,
    Richard Tan

  • chandu_sri's avatar
    chandu_sri
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    9 months ago

    I was unable to upgrade our design to 25.1.1pro, it fails to upgrade, for which I had to manually create the HPS Ip core. 

    Attaching the design I have worked so far for 25.1.1 pro.

     

    Thanks,

    Chandu sri

  • chandu_sri's avatar
    chandu_sri
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    9 months ago

    shared the file from Me2U as I am unable to attach it here.

  • RichardT_altera's avatar
    RichardT_altera
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    9 months ago

    I don't see the error that you are seeing. 
    Please kindly confirm whether it works by download the QAR design that you shared and run it in a new folder. 
    This will ensure that the design is able to duplicate the error. 
    Additionally, the top level entity 62702_krpi is missing. 
     

    • chandu_sri's avatar
      chandu_sri
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      8 months ago

      Hi Richard,

      Sorry, I am missing to check the altera community forum. looks like as it is failing to create hps IP it is not reflected in .qar file, could you please try to create an HPS IP core from your end and see if the errors I shared earlier are replicated.

      Thanks,

      Chandu sri

      • RichardT_altera's avatar
        RichardT_altera
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        8 months ago

        Pasting the error here for reference and tracking:

        Warning: krpi_hps.arria10_hps_0: HPS model no longer supports simulation for HPS FPGA Bridges.
Warning: krpi_hps.arria10_hps_0: This module has no ports or interfaces
Info: Platform Designer Tip: Please Sync All System Infos before attempting to resolve the following error messages
Error: krpi_hps.arria10_hps_0: Unsupported device 10AS057K2F40I1HG
Error: krpi_hps: list element in quotes followed by ":" instead of space
   while executing
"foreach {pad_id ball_name } $location_map {
                             set pad_name "PAD_${pad_id}"
                             set pad_to_ball_name($pad_name) $ball_name
                             #send_message info " $pad_na..."
   (procedure "elab_io_interface_signals" line 36)
   invoked from within
"elab_io_interface_signals $peripheral_name $mode_value peripheral_ports"
   (procedure "elab_FPGA_Peripheral_Signals" line 123)
   invoked from within
"elab_FPGA_Peripheral_Signals $device_family"
   (procedure "elab" line 60)
   invoked from within
"elab 1"
   (procedure "compose_logicalview" line 7)
   invoked from within
"compose_logicalview"
Error: krpi_hps.arria10_hps_0: "Counter for GPIO debouncer" (CONFIG_HPS_DIV_GPIO) 0 is out of range: 1-65535
Error: krpi_hps.arria10_hps_0: "Sugested peripherial PLL VCO frequency" (PERI_PLL_AUTO_VCO_FREQ) 0 is out of range: 320-3000


        I do not see this error on my side. Could you confirm whether this error occurs during the Platform Designer Generate HDL process?
        I’ve attached a simple design for you to test it out.

        Regards,
        Richard Tan
         

  • chandu_sri's avatar
    chandu_sri
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    8 months ago

    Yes, this error occurs in Platform designer when creating HPS IP core

     

    • RichardT_altera's avatar
      RichardT_altera
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      8 months ago

      I suspect that you are not adding the HPS IP or making the connections correctly.
      Please refer to the GHRD design I shared to understand how to connect the HPS IP.

      Alternatively, try removing and re-adding the HPS IP in the top.qsys file.

      Regards,
      Richard Tan 

      • chandu_sri's avatar
        chandu_sri
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        8 months ago

        I have taken your .qar file and it seems like the device you are using is different. I tried to change the device at my end and regenerate the Qsys_top, but, it got stuck and I am unable to regenerate.

        Could you try with device number 10AS057K2F40I1HG and check if you are able to generate the Qsys.

        Thanks,

        Chandu sri

  • RichardT_altera's avatar
    RichardT_altera
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    8 months ago

    I don’t have any issues generating, even when changing the device to 10AS057K2F40I1HG.
    Both Linux and Windows OS are able to generate successfully.
    If possible, could you try using a different machine and see if the same issue occurs?

    Regards,
    Richard Tan 

  • chandu_sri's avatar
    chandu_sri
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    8 months ago

    I tried on different Linux views, it is showing the same Device error as shared earlier. could you let me know if you are available for a meeting to look into this issue, we are having urgent requirement of this design upgrade.

    I am in IST time zone, available for call from 3:30PM to 4:30PM IST today (01/12/2026) and 11:30AM to 4:30PM IST tomorrow as well(01/13/2026).

    Thanks,

    Chandu sri