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SHung4's avatar
SHung4
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7 years ago

How to use MACRO on altera modelsim

I add a MACRO on Setting-compiler setting-Verilog HDL input, and it works.

But when I run RTL sim by altera modelsim, it seem that it don't use the MACRO. What is the right way to use MACRO on altera modelsim, thanks.

5 Replies

  • AnandRaj_S_Intel's avatar
    AnandRaj_S_Intel
    Icon for Regular Contributor rankRegular Contributor

    Hi,

    In the Transcript window

    ->do <file name >.do

    Will run the macro.

    For more information refer below links

    https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_gs_msa_qii.pdf

    http://home.eng.iastate.edu/~zzhang/courses/cpre581-f05/resources/modelsim.pdf

    Let me know if this has helped resolve the issue you are facing or if you need any further assistance.

    Best Regards,

    Anand Raj Shankar

    (This message was posted on behalf of Intel Corporation)

  • SHung4's avatar
    SHung4
    Icon for New Contributor rankNew Contributor

    I write the code in verilog file like this:

    ----

    `ifdef FPGA

    .....

    `endif​

    ----

    And I can use Setting-compiler setting-Verilog HDL input to add a macro FPGA when synthesis.

    But I find that it don't work when run RTL-simulation.

  • AnandRaj_S_Intel's avatar
    AnandRaj_S_Intel
    Icon for Regular Contributor rankRegular Contributor

    Hi,

    +define+<macro_name>[=<macro_text>]

    I have used simple example

    ########################CODE##########################

    module and_op (a, b, c);

    output a;

    input b, c;

    `ifdef behavioral

    wire a = b & c;

    `else

    or a1 (a,b,c);

    `endif

    endmodule

    ##########################CODE####################

    ​vlog +define+behavioral -work work and_op.v

    Let me know if this has helped resolve the issue you are facing or if you need any further assistance.

    Best Regards,

    Anand Raj Shankar

    (This message was posted on behalf of Intel Corporation)

  • SHung4's avatar
    SHung4
    Icon for New Contributor rankNew Contributor

    Is there any method to add some setting on Quartus, so that I can push "Tools/Run Simulation/RTL Simulation" to run simulation?

  • AnandRaj_S_Intel's avatar
    AnandRaj_S_Intel
    Icon for Regular Contributor rankRegular Contributor

    Hi,

    Yes,

    We can have simple .do script to set the simulation environment(macro enabled).

    To launch simulation from Quartus.

    Assignments->settings->EDA tool Settings->simulation->tool name Modelsim-Altera ->select the option "script to compile test bench" -> input the .do with the macro which you want enable.

    To run the simulation from Quartus

    Tools->Run Simulation Tools->RTL Simulations.

    Refer image for more information.

    I have used about code with simple .do file .

    ------------.do---------------

    vlog +define+behavioral -work work C:/......./macro/and_op.v

    ------------------------------

    Which will launch Modelsim and run simulation for the enabled macro.

    Let me know if this has helped resolve the issue you are facing or if you need any further assistance.

    Best Regards,

    Anand Raj Shankar

    (This message was posted on behalf of Intel Corporation)