Quartus 22.1 and 23.1 Synthesis Error

Hi,

I am currently working on a project targeting a Cyclone V device using Quartus Prime versions 22.1 and 23.1. The design compiles and functions correctly with no issues. However, after adding an FFT IP core, Quartus frequently fails during synthesis with the error shown below.

The issue is reproducible in both Quartus versions. Interestingly, the compilation succeeds only intermittently (approximately once every 5–6 attempts), while most synthesis runs fail. Another observation is that if I change the Synthesis Effort setting to Fast, the design compiles successfully every time.

Has anyone encountered similar behaviour or have any suggestions on how to work around this issue?

Thanks in advance.