Forum Discussion
Occasional ContributorFailed to run ip-setup-simulation:
Hello Altera Community.
I'm trying to simulate an example generated by the FPGA AI Suite. However I get a list of errors which is attached below in a txt file.
In Settings -> IP Simulation
CHECKED: Generate IP Sim model
FLOW: QRUN
SIMULATORS: QuestaSIM
It seems like the example is already setup for simulation expect its missing a testbench.
I am running Quartus in admin mode. I have installed EDA Lib. I have installed Questa.
What should I do to get it working?
Is this because it is defined in a SystemVerilog package, as mentioned in the user guide?
Does the simulation file generation succeed when you select 'Verilog' instead?
I am not very familiar with the FPGA AI Suite IP, and I believe the default simulation flow may differ when working with it.
I would recommend referring to the user guide below for more details.
https://docs.altera.com/r/docs/863373/2026.1.1/fpga-ai-suite-handbook/the-flow-remove-arch-flow
Regards,
Richard Tan
3 Replies
- RichardT_altera
Super Contributor
The error indicates that the .spd files are not found. Have you generated the simulation files for your Qsys system?
Regards,
Richard Tan- Mads_From_Denmark
It seems that it is not possible to generate a simulation for the systems in the example.
Error: altera_ai_ip_2: altera_ai_ip does not support generation for VHDL Simulation. Generation is available for: Quartus Synthesis.
Error: SPD file was not generated: C:\Users\mads\Desktop\agx5_soc_s2m_lt\hw\qsys\ip\dla\dla_altera_ai_ip_2\dla_altera_ai_ip_2.spd- RichardT_altera
Is this because it is defined in a SystemVerilog package, as mentioned in the user guide?
Does the simulation file generation succeed when you select 'Verilog' instead?
I am not very familiar with the FPGA AI Suite IP, and I believe the default simulation flow may differ when working with it.
I would recommend referring to the user guide below for more details.
https://docs.altera.com/r/docs/863373/2026.1.1/fpga-ai-suite-handbook/the-flow-remove-arch-flow
Regards,
Richard Tan
