How can I pick some bits from bus in Quartus?

Hi,

Please verify the connection as shown below,

let me know, how it works for you.

Regards,

Vicky

Sorry, but I don't understand what you did. Could you explain me, please?

Vicky is saying you don't need separate bit taps for each bit. You already named the vector correctly (Salida_alu[3..0]) so just connect it directly. The bigger issue I see is that you'll have multiple drivers directly driving ALU_DER. Should there be some logic to select between Salida_alu[3..0] and Entrada_Func_Alu2[3..0]?

#iwork4intel

Hello again, sorry for these newbie questions, but I'm starting in Quartus.

It really doesn't have logic what I was doing, it was just a small test to connect other modules.

I already found what it required, thank you very much to both of you.

Regards.

Ray.

This is what I was looking for in 'RTL'

Hi Ray,

I appreciate your efforts & patience.

just perform the following steps,

1. draw one line using "Orthogoanl Bus Tool" in .bdf file & name it as Salida_alu[3..0].
2. Then connect one end of Salida_alu[3..0] to the bus line" Entrada_Fun_alu2[3..0]" as shown in below screenshot.

let me know if this has helped to you or if you have any different concern.

Regards,

Vicky

Hi,

Have you resolved the issue?

Shall I consider the case to be closed?

Regards,

Vicky