Forum Discussion
Remote Update IP Support for Generic Serial Flash Interface on Cyclone V?
Does the Remote Update IP for Cyclone V support the Generic Serial Flash Interface IP?
I would like to request private message support. Thank you.
7 Replies
- Farabi_Altera
Regular Contributor
Hello,
I reply to private message.
regards,
Farabi
- Farabi_Altera
Regular Contributor
Hello,
Do you have further question?
- Praxis_Kernfeld
New Contributor
Hello,
I am writing in reply to the private message.
Regards,
Praxis
- Farabi_Altera
Regular Contributor
On the Remote Update IP + GSFI IP relationship for Cyclone V — yes, these two IPs are used together in the Cyclone V RSU flow.
The Remote Update IP provides a memory-like interface to the remote system upgrade circuitry and handles the shift register read/write protocol in the Cyclone V device logic. Cyclone V Device Handbook Volume 1: Device Interfaces and Integration The Generic Serial Flash Interface (GSFI) IP handles the actual flash memory operations — read device ID, sector protect, sector erase, and read/write data to/from the flash device. Cyclone® V FPGA – Generic Serial Flash Interface Altera® FPGAs IP Core Reference Design
When the clock source for the Remote Update IP is **shared** with a flash controller IP — including the Generic Serial Flash Interface IP — the maximum operating frequency is limited by the maximum frequency supported by that flash controller IP. How do I determine the maximum frequency for Remote Update Intel® FPGA IP ? If the clock source is **not** shared with the flash controller IP, the Remote Update IP can run as high as 100 MHz on Cyclone V devices. How do I determine the maximum frequency for Remote Update Intel® FPGA IP ?
One important known issue to be aware of: when instantiating the Remote Update IP with an EPCQ-A device and the POF Check option enabled, reconfiguration of Cyclone V devices may fail. The workaround is to use EPCS instead of EPCQ-A at the same density. This was fixed starting with Quartus Prime Standard Edition version 19.1. Why do I get reconfiguration error with Intel® Cyclone® V, Arria® V, and Stratix® V devices when the POF check option is enabled in the Remote Update IP?
Also worth noting for future planning — if you ever migrate to Agilex 3, you would replace both the GSFI IP and the Remote Update IP with the Mailbox Client IP to support QSPI flash access and RSU. Cyclone V to Agilex™ 3 Device Migration Guide
Regarding your request for private message support: this is a public community forum and private/direct messaging isn't something I'm able to facilitate here. For private case-based support, I'd recommend opening a service request through the Altera Premier Support portal, where an applications engineer can work with you directly on your specific design. - Farabi_Altera
Regular Contributor
looks like I can't reply your post in private message. I am checking with admin.
- BCuze
Occasional Contributor
Hi, ALSE is an Altera partner... you should have no problem reaching me. Wed site site FPGA.fr
- BCuze
Occasional Contributor
We (ALSE - fpga.fr) have a nice option to our Ethernet IP (GEDEK) allowing safe remote update of the configuration Flash through Ethernet. Works out of the box, for all types of Flash memories, and it comes with Windows and Linux update utilities. Available for all Altera families.