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jkmchow's avatar
jkmchow
Icon for New Contributor rankNew Contributor
3 years ago
Solved

errors found while generate project in "nios II build tools for eclipse"

I am using Quatus Prime Lite 17.1. In Nios II build tool for eclipse, two files were made, "embed" and "embed_system.bsp", of which the build project was done successfully. However, to build project of "embed" failed with errors as followed:


"#error Your SystemID peripheral must be named exactly "sysid" in your SOPC Builder system. Please check that you have properly constructed your system before compiling this program.
^
inc/system_validation.h:32:6: error: #error Your JTAG UART peripheral must be named exactly "jtag_uart" in your SOPC Builder system. Please check that you have properly constructed your system before compiling this program.
#error Your JTAG UART peripheral must be named exactly "jtag_uart" in your SOPC Builder system. Please check that you have properly constructed your system before compiling this program.
^
make: *** [obj/default/main.o] Error 1

20:43:28 Build Finished (took 2s.537ms)"

In the Platform Designer (SOPC Builder system). These names "sysid" and "jtag_uart" were used as the error messages suggested. What are the problems and the solution?

  • KellyJialin_Goh's avatar
    KellyJialin_Goh
    3 years ago

    Hi,

    Could you try using the Nios II SBT design template, and select the Hello World template. Then, you should regenerate a new BSP to see the mismatch of names come from the new BSP, or you were using the old BSP generated with the wrong name.


    Also, what is the FPGA development kit you are using for your project?


    Hope this helps.


    Thank you.


    Regards.

    Kelly


16 Replies

  • sstrell's avatar
    sstrell
    Icon for Super Contributor rankSuper Contributor
    3 years ago

    Did you try regenerating your system in Platform Designer to create an updated .sopcinfo file? Perhaps the build tools are seeing old info.

  • jkmchow's avatar
    jkmchow
    Icon for New Contributor rankNew Contributor
    3 years ago

    Yes, once the suggested corrections were made in the Design Platform. The new system was generated in Design Platform and a full compilation in Quartus Prime Lite was done successfully. Then the eclipse was performed, still the same errors messages appeared.

    • jkmchow's avatar
      jkmchow
      Icon for New Contributor rankNew Contributor
      3 years ago

      Hi, Kelly,

      Thanks for the information. I have followed your suggestion and followed every details. However, I got the same error messages.

      Joseph

    • jkmchow's avatar
      jkmchow
      Icon for New Contributor rankNew Contributor
      3 years ago

      Hello Kelly,

      I am designing the Nios II for a course assignment, one requirement of which is to use the "sdram controller IP". Only the Quartus Prime Lite 17.1 supports this IP. Unless there is a way to add this IP in the other more updated versions of Quartus Prime Lite, my assignment will be stucked.

      Thank you for your attention and help.

      Joseph

  • KellyJialin_Goh's avatar
    KellyJialin_Goh
    Icon for Frequent Contributor rankFrequent Contributor
    3 years ago

    Hi,

    Just to confirm whether did you insert System ID(sysid) and jtag_uart IPs in your platform designer for your design?

    SDRAM controller IP supports up to 20.1 lite version, but however there will be IP upgrades for your design that may require extra effort on debugging.


    Hope to hear on your feedback.


    Thanks.


    Regards,

    Kelly


  • KellyJialin_Goh's avatar
    KellyJialin_Goh
    Icon for Frequent Contributor rankFrequent Contributor
    3 years ago

    Hi,

    Any updates from your end whether the information provided was useful to solve your issue?


    Thank you.


    Regards,

    Kelly



  • jkmchow's avatar
    jkmchow
    Icon for New Contributor rankNew Contributor
    3 years ago

    Hi Kelly,

    Your comment gave some clues to solve the problem.

    The photo attached shows System ID(sysid) and jtag_uart IPs were inserted and the names were changed to required names in Platform Designer. Why were there errors for these two IPs while the other IPs worked fine?

    I am still working on it.

    Joseph

  • KellyJialin_Goh's avatar
    KellyJialin_Goh
    Icon for Frequent Contributor rankFrequent Contributor
    3 years ago

    Hi,

    Thank yo for your response, but after you added in the sysid and jtag_uart IP and name them according to the user guide, do you still get any errors?


    Hope to hear from you. Thank you.


    Regards,

    Kelly


  • KellyJialin_Goh's avatar
    KellyJialin_Goh
    Icon for Frequent Contributor rankFrequent Contributor
    3 years ago

    Hi,

    Any updates from your end from your end? Is the feedback provided useful?


    Regards,

    Kelly


  • KellyJialin_Goh's avatar
    KellyJialin_Goh
    Icon for Frequent Contributor rankFrequent Contributor
    3 years ago

    Hi,

    Any feedback from your end? Have you managed to eliminate the errors after adding the correct IP names?


    Thank you.


    Regards.

    Kelly


    • jkmchow's avatar
      jkmchow
      Icon for New Contributor rankNew Contributor
      3 years ago

      Hello Kelly,

      I have been trying all possible ways to eliminate the errors. There is still no luck.

      Thank you for your attention.

      Joseph