Forum Discussion
Nios V uC/TCP IP Failed
Hi support,
I am learning the simple socket server design on Cyclone 10 GX.
For unknown reason, the initialization process stopped with the error code (2010),
It's the TSE with DP83848.
The signals on MDIO and MDC is working.
Therefore I would like to know how to debug this issue.
Thank you.
BRs,
Johnson
Hi
Did you managed to run the example design on the Cyclone10 EVB yet?
Please note the following setting when trying to generate the BSP for the application.
5.5.2.2. Configuring the BSP (intel.com)
For the application you could reuse the application code from the latest design example.
Regards
Jingyang, Teh
34 Replies
- EBERLAZARE_I_Intel
Regular Contributor
Hi,
I may need some days to debug this issue, I shall update to you again in the next few days.
- EBERLAZARE_I_Intel
Regular Contributor
Hi,
From my findings, the signal issue you mentioned, it seems that it has something to do with some settings that need to be tweaked.
I will further investigate towards that and get back to you soon with some suggested workaround.
Thanks for your patience.
- EBERLAZARE_I_Intel
Regular Contributor
Hi,
Does the issue always have the "ff_rx_rdy" high? OR do you have it work at random times?
One of the workaround I could find was implementing a reset. I am not that familiar with the TSE IP, you could try to perform a reset signal:
- JLee25
Contributor
Hi,
From the STP content below, I think the ff_rx_rdy is a signal from DMA.
After downloading the sof and elf, the system booted with ff_rx_rdy high, which indicate to the core ready to receive data.
But it went low after with the network connected..
Therefore I guess there are problems on the msgdma ..
I read back some register settings on TSE core, and thought it should be configured correctly.
- JLee25
Contributor
Hi,
I modify the design with Nios V to EMIF through a memory mapped clock crossing bridge and DMA through another bridge.
But for unknown reason the DMA bridge is not running...
I STP the bus and found only Nios V is running..
Any suggestions ? DMA driver or ...
- EBERLAZARE_I_Intel
Regular Contributor
Hi,
Is the DMA & EMIF visible in the "drivers" tab in BSP-editor?
- JLee25
Contributor
Hi,
I believe so, as
and
- EBERLAZARE_I_Intel
Regular Contributor
Hi,
Since we currently do not have the example for the Simple Socket Server with EMIF for Nios V, can you try with the OCRAM as per the Nios V handbook?:
Try with OCRAM, if it works then I can recommend to try with EMIF.
- JLee25
Contributor
Hi,
I tried OCRMA before EMIF and it's not working for unknown reason.
I upload the QAR for your reference.
The STP content is the same as EMIF...
Perhaps some components are with wrong settings..
- tehjingy_Altera
Regular Contributor
HI
I am Jingyang and I will be taking over the case from Eber.
Sorry for the late response as there are a surge in cases at the moment.
Please give me sometime to try get the example design running and try probe the behavior of the ff_rx_rdy pin.
Regards
Jingyang, Teh
- tehjingy_Altera
Regular Contributor
Hi
Sorry there is a current surge in case and I will need more time in this case.I managed to run the example design and able to connect to the board through Telnet. Currently I will need more time to acquire the signalTap waveform.
Previously when you switch the Example Design to DHCP. Are you able to connect to the board through Telnet?
Regards
Jingyang, Teh
- JLee25
Contributor
Hi Jingyang,
Thank you for the update.
So you can run the example design on the Cyclone 10 GX device and can telnet it?
If this is the case, would you share me the example?
As I never have any change to connect to the board.
BRs,
Johnson