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Altera_Forum's avatar
Altera_Forum
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21 years ago

Hello_led can not run on Nios II/s core.

Hi,

I use the Microtronix Cyclone Dev.Board, and follow the Altera Hardware Design and Software Design.

When I make the LowCost HardWare Design(use the Nios II/e Core and epcs_controller as the reset address) and run the Software Design(allowed under the lowcost), all allowed software can run on the board, but some message display,

"nios2-terminal: Warning: The JTAG cable you are using is not supported for Nios

nios2-terminal: II systems. You may experience intermittent JTAG communication

nios2-terminal: failures with this cable. Please use a USB Blaster revision B

nios2-terminal: cable or another supported cable. Please refer to the file

nios2-terminal: errata.txt included in the Nios II development kit documents

nios2-terminal: directory for more information.

nios2-terminal: connected to hardware target using JTAG UART on cable

nios2-terminal: "ByteBlasterII [LPT1]", device 1, instance 0

nios2-terminal: starting in terminal mode only (Control-C exits)".

But When I make the standard HardWare Design(use the Nios II/S core and ext_flash as the reset address),

when I run the software, the Nios II IDE also diplay

"nios2-terminal: Warning: The JTAG cable you are using is not supported for Nios

nios2-terminal: II systems. You may experience intermittent JTAG communication

nios2-terminal: failures with this cable. Please use a USB Blaster revision B

nios2-terminal: cable or another supported cable. Please refer to the file

nios2-terminal: errata.txt included in the Nios II development kit documents

nios2-terminal: directory for more information.

nios2-terminal: connected to hardware target using JTAG UART on cable

nios2-terminal: "ByteBlasterII [LPT1]", device 1, instance 0

nios2-terminal: starting in terminal mode only (Control-C exits)

"

and nothing happen on the board.

What is wrong? Can someone tell me?

If need the detailed info about my setting, I will paste.

Thank you.

18 Replies

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  • Altera_Forum's avatar
    Altera_Forum
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    20 years ago

    In your quartus settings for the device and pin options check to make sure unused I/O are tri-stated. Also make sure that all your assigned I/O make it to the correct locations (easiest way is to look at the assignment editor or the .pin file).

  • Altera_Forum's avatar
    Altera_Forum
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    20 years ago

    It has nothing to do with USBblaster cable (just bypass the warning), but you'd better buy a UART cable. It is cheap and important for run/debug nios II applications. In fact, UART cable is necessary to you, I think.

  • Altera_Forum's avatar
    Altera_Forum
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    20 years ago

    <div class='quotetop'>QUOTE </div>

    --- Quote Start ---

    It has nothing to do with USBblaster cable (just bypass the warning), but you&#39;d better buy a UART cable. It is cheap and important for run/debug nios II applications. In fact, UART cable is necessary to you, I think.[/b]

    --- Quote End ---

    What problems are you having which force you to use a standard UART? I&#39;ve been using a JTAG UART for ages with no problems.
  • Altera_Forum's avatar
    Altera_Forum
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    20 years ago

    The only people I recommend use a Uart are those that know their end system will not have a JTAG connection. Some people would want to use the JTAG Uart anyway for debug purposes due to it&#39;s speed but I think there is merit in using the UART for this as well (to test it&#39;s communication reliability amungst other things).

  • Altera_Forum's avatar
    Altera_Forum
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    20 years ago

    Hello,

    I have solved the problem by changing the SDRAM Controller Core.

    I think it is the bug of SDRAM Controller Core(the new_sdram_controller provided by nios2 kit ). I use the SDRAM Controller Core of SOPC Builder 2.7 Provided instead. The program can run and led is lightened.

    Why?

    But the new_sdram_controller_core can used by Nios II/e Core and all test programs can run with Nios II/e Core normally.

    When use Nios II/s Core, I must use the old sdram_controller_core instead.

    My Dev board is Microtronix Cyclone Development Board.

    I have read the .ptf file of each controller core, but I do not know exactly which part can disable my system.

    Can tell me the reason?

    Thank you.
  • Altera_Forum's avatar
    Altera_Forum
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    20 years ago

    Do you have any insight into what the problem was with the core you were using.

    I believe I am suffering a similar problem albeit in a different environment. I am using a cyclone dev kit with quartus 4.2 sp 1 and nios ii 1.1 (latest). Using the HAL but no OS.

    I have binned the sdram and located my application in sram. I can download code to the board and make it run but when I try to debug I see very similar messages.

    The console is unresponsive and the message &#39;processor already paused&#39; is worryingly there.

    I have also seen a message which says error accessing memory address 0x80035c (0x800000 being the base of sram).

    if there is something about the sdram controller which caused gdb to stall maybe it is also causing me a problem at the moment. perhaps you could enlighten me ?
  • Altera_Forum's avatar
    Altera_Forum
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    20 years ago

    Hello benmidgley,

    <div class='quotetop'>QUOTE </div>

    --- Quote Start ---

    Do you have any insight into what the problem was with the core you were using.[/b]

    --- Quote End ---

    My SDRAM is MT48LC2M32B2.

    I just found that there is the single Micro MT48LC2M32B2-7 chip in the Presets: menu of sdram_controller(new_sdram_controller). I choose this. Do not change anything. Then, my system can run.