I&#39;m trying to connect to a Cyclone II board using jtagd and nios2-gdb-server-wrapped under Linux. They seem to find the USBBlaster OK -- the blue LED flashes briefly when I start the gdb-server, but then the gdb-server complains and exits: # ./nios2-gdb-server-wrapped There are no Nios II CPUs with debug modules available which match the values specified. Please check that your PLD is correctly configured, downloading a new SOF file if necessary.# Questions:[list][*]In the message above to what does the phrase "the values specified" refer? I don&#39;t see where I specified any values.[*]What command line parameters or config file entries do I need to connect to a Cyclone II demo board? I don&#39;t have a .jtag.conf file, and I know the gdb-server tries to read ~/.jtag.conf. Neither did I specify a config file when I started jtagd. [/list]

Running &#39;jtagconfig&#39;, from an EDS command shell should provide you with the necessary information. You should see output similar to the following: 1) USB-Blaster 020010DD EP1S10 Node 11104600 Node 0C006E00 The two "nodes" are (in my case) the jtag_uart in my design and the jtag debug core, which is used to communicate with the gdb server.... Here are a couple of pointers: 1. jtagd doesn&#39;t need to be started as a separate process. The act of starting any of the "clients" that use jtagd (i.e.: jtagconfig or gdb_server) should be enough. 2. Don&#39;t call the gdb-server-wrapped command, directly. - Though I don&#39;t think you&#39;re doing this, I wanted to be sure. Here&#39;s the sort of command sequence, that I&#39;ve used successfully: 1. Start the gdb server: nios2-gdb-server --tcpport=2342 --tcppersist 2. Start the client: nios2-elf-gdb <your_program>.elf 3. From within the client&#39;s GDB console: (gdb) target remote localhost:2342 Remote debugging using localhost:2342 (gdb) load Loading section .exceptions, size 0x13c lma 0x4000020 Loading section .text, size 0x277bc lma 0x1000000 Loading section .rodata, size 0x39b8 lma 0x10277bc Loading section .rwdata, size 0x1f50 lma 0x102b174 Start address 0x1000000, load size 184832 Transfer rate: 739328 bits/sec, 510 bytes/write. From this point, you should be able to start, step and debug your code. In other words, it&#39;s standard GDB stuff....once you have the conduit setup. Cheers, - slacker

Firstly, thanks for the help. (I swear I replied to this posting this morning, but my posting seems to have gone missing.) --- Quote Start --- originally posted by slacker@Oct 29 2006, 01:48 AM running &#39;jtagconfig&#39;, from an eds command shell should provide you with the necessary information. you should see output similar to the following: 1) usb-blaster 020010dd ep1s10 node 11104600 node 0c006e00 --- Quote End --- When I run jtagconfig connected to the Cyclone-II board: # ./jtagconfig 1) USB-Blaster 020B40DDAnd when I run gdb-server: # ./nios2-gdb-server --tcpport 4321 There are no Nios II CPUs with debug modules available which match the values specified. Please check that your PLD is correctly configured, downloading a new SOF file if necessary. When connected to my real target board: # ./jtagconfig 1) USB-Blaster 020B30DD ! 020A10DD ! Captured DR after reset = (020B30DD020A10DD) Captured IR after reset = (55555) I expect two nodes, since that board has both the NIOS2 debug unit and the jtag uart. When I run the gdb-server connected to my ral target, I get the same result as with the Cyclone-II. <div class='quotetop'>QUOTE </div> --- Quote Start --- 1. jtagd doesn&#39;t need to be started as a separate process. The act of starting any of the "clients" that use jtagd (i.e.: jtagconfig or gdb_server) should be enough.[/b] --- Quote End --- Doh. I should have known that. <div class='quotetop'>QUOTE </div> --- Quote Start --- From this point, you should be able to start, step and debug your code. In other words, it&#39;s standard GDB stuff....once you have the conduit setup.[/b] --- Quote End --- Yup, that&#39;s all I want is a working gdb-server. I can handle it from there.

--- Quote Start --- originally posted by grante@Oct 29 2006, 08:01 PM firstly, thanks for the help. when connected to my real target board: # ./jtagconfig 1) usb-blaster 020b30dd ! 020a10dd ! captured dr after reset = (020b30dd020a10dd) captured ir after reset = (55555) i expect two nodes, since that board has both the nios2 debug unit and the jtag uart. when i run the gdb-server connected to my ral target, i get the same result as with the cyclone-ii. yup, that&#39;s all i want is a working gdb-server. i can handle it from there. <div align='right'><{post_snapback}> (index.php?act=findpost&pid=19001)</div> --- Quote End --- The output from your jtagconfig command doesn&#39;t look correct. Is it possible that any of the IP you have built into your FPGA image is time limited? For instance, the Nios II processor can be run in "tethered" mode without a license, but a license is required for any other use of the core. On the Cyclone II Dev. Kit, are you sure you&#39;re using one of the included HW examples designs? They should have SOFs based on non-time-limited cores. Best Regards, - slacker

--- Quote Start --- originally posted by slacker@Oct 30 2006, 12:20 PM the output from your jtagconfig command doesn&#39;t look correct.is it possible that any of the ip you have built into your fpga image is time limited? --- Quote End --- I have no clue. I just took the demo board out of the box and plugged it in. I assumed they shipped it configured such that it would work with the USBBlaster that came in the same box. <div class='quotetop'>QUOTE </div> --- Quote Start --- For instance, the Nios II processor can be run in "tethered" mode without a license, but a license is required for any other use of the core. On the Cyclone II Dev. Kit, are you sure you&#39;re using one of the included HW examples designs? They should have SOFs based on non-time-limited cores.[/b] --- Quote End --- I&#39;m just using whatever Altera shipped in the board. Anyway, I&#39;ve given up on the Cyclone-II dev, since I&#39;ve got a real board from the hardware guys now. When I run jtagconfig under Linux I get: 1) USB-Blaster 020B30DD ! 020A10DD ! When the same board is moved to a USBBlaster on a Windows machine, I get this: 1) USB-Blaster (USB-0) 020B30DD EP2C20 020A10DD EPM240 It&#39;s the same set of JTAG IDs, so the JTAG end of things is working fine, it&#39;s just that jtagconfig and gdb-server don&#39;t recognize the JTAG IDs on my Linux box. I still think I&#39;m missing some configuration info that&#39;s supposed to go in ~/.jtag.conf. libjtag_client tries to read that file, but it&#39;s not there. I&#39;m trying to figure out what the equivalent file is under Windows. If there is any documentation for the gdb-server that explains what configuration files it needs, feel free to point me in the right direction.

Hey there! I think that you&#39;re probably seeing things OK. The reason the tool isn&#39;t identifying the devices is that you&#39;re probably missing a pgm_parts file. You may also want to take a look at the information, regarding this topic, on the Altera web site (http://www.altera.com/support/software/drivers/dri-usb_b-lnx.html). It could be that you don&#39;t have correct USB dev permissions set. I would next try taking a look at the output of &#39;jtagconfig -n&#39; or &#39;jtagconfig -d&#39;. It should look something like this: 1) USB-Blaster 020010DD EP1S10 <--- This is your FPGA on the JTAG chain. Node 11104600 <--- This is your JTAG debug module. Node 0C006E00 <--- This is the jtag_uart in my design (you might or might not see this...) Cheers, - slacker

gdb-server can't find Cyclone II board | Altera Community

11 Replies

Altera_Forum
Honored Contributor
19 years ago
Running 'jtagconfig', from an EDS command shell should provide you with the necessary information. You should see output similar to the following:

1) USB-Blaster 020010DD EP1S10 Node 11104600 Node 0C006E00

The two "nodes" are (in my case) the jtag_uart in my design and the jtag debug core, which is used to communicate with the gdb server....

Here are a couple of pointers:

1. jtagd doesn't need to be started as a separate process. The act of starting any of the "clients" that use jtagd (i.e.: jtagconfig or gdb_server) should be enough.
2. Don't call the gdb-server-wrapped command, directly.
- Though I don't think you're doing this, I wanted to be sure.

Here's the sort of command sequence, that I've used successfully:

1. Start the gdb server: nios2-gdb-server --tcpport=2342 --tcppersist 2. Start the client: nios2-elf-gdb <your_program>.elf 3. From within the client's GDB console: (gdb) target remote localhost:2342 Remote debugging using localhost:2342 (gdb) load Loading section .exceptions, size 0x13c lma 0x4000020 Loading section .text, size 0x277bc lma 0x1000000 Loading section .rodata, size 0x39b8 lma 0x10277bc Loading section .rwdata, size 0x1f50 lma 0x102b174 Start address 0x1000000, load size 184832 Transfer rate: 739328 bits/sec, 510 bytes/write.

From this point, you should be able to start, step and debug your code. In other words, it's standard GDB stuff....once you have the conduit setup.

Cheers,

- slacker
Altera_Forum
Honored Contributor
19 years ago
Firstly, thanks for the help.

(I swear I replied to this posting this morning, but my posting seems to have gone missing.)

--- Quote Start ---
originally posted by slacker@Oct 29 2006, 01:48 AM
running 'jtagconfig', from an eds command shell should provide you with the necessary information. you should see output similar to the following:

1) usb-blaster 020010dd ep1s10 node 11104600 node 0c006e00

--- Quote End ---
When I run jtagconfig connected to the Cyclone-II board:
# ./jtagconfig 1) USB-Blaster 020B40DD
And when I run gdb-server:
# ./nios2-gdb-server --tcpport 4321 There are no Nios II CPUs with debug modules available which match the values specified. Please check that your PLD is correctly configured, downloading a new SOF file if necessary.

When connected to my real target board:
# ./jtagconfig 1) USB-Blaster 020B30DD ! 020A10DD ! Captured DR after reset = (020B30DD020A10DD) Captured IR after reset = (55555)

I expect two nodes, since that board has both the NIOS2 debug unit and the jtag uart.

When I run the gdb-server connected to my ral target, I get the same result as with the Cyclone-II.
<div class='quotetop'>QUOTE </div>
--- Quote Start ---
1. jtagd doesn't need to be started as a separate process. The act of starting any of the "clients" that use jtagd (i.e.: jtagconfig or gdb_server) should be enough.[/b]
--- Quote End ---
Doh. I should have known that.
<div class='quotetop'>QUOTE </div>
--- Quote Start ---
From this point, you should be able to start, step and debug your code. In other words, it's standard GDB stuff....once you have the conduit setup.[/b]
--- Quote End ---
Yup, that's all I want is a working gdb-server. I can handle it from there.
Altera_Forum
Honored Contributor
19 years ago
--- Quote Start ---
originally posted by grante@Oct 29 2006, 08:01 PM
firstly, thanks for the help.

when connected to my real target board:
# ./jtagconfig 1) usb-blaster 020b30dd ! 020a10dd ! captured dr after reset = (020b30dd020a10dd) captured ir after reset = (55555)

i expect two nodes, since that board has both the nios2 debug unit and the jtag uart.

when i run the gdb-server connected to my ral target, i get the same result as with the cyclone-ii.
yup, that's all i want is a working gdb-server. i can handle it from there.
<div align='right'><{post_snapback}> (index.php?act=findpost&pid=19001)</div>
--- Quote End ---

The output from your jtagconfig command doesn't look correct. Is it possible that any of the IP you have built into your FPGA image is time limited? For instance, the Nios II processor can be run in "tethered" mode without a license, but a license is required for any other use of the core. On the Cyclone II Dev. Kit, are you sure you're using one of the included HW examples designs? They should have SOFs based on non-time-limited cores.

Best Regards,

- slacker
Altera_Forum
Honored Contributor
19 years ago
--- Quote Start ---
originally posted by slacker@Oct 30 2006, 12:20 PM
the output from your jtagconfig command doesn't look correct.is it possible that any of the ip you have built into your fpga image is time limited?
--- Quote End ---
I have no clue. I just took the demo board out of the box and plugged it in. I assumed they shipped it configured such that it would work with the USBBlaster that came in the same box.
<div class='quotetop'>QUOTE </div>
--- Quote Start ---
For instance, the Nios II processor can be run in "tethered" mode without a license, but a license is required for any other use of the core. On the Cyclone II Dev. Kit, are you sure you're using one of the included HW examples designs? They should have SOFs based on non-time-limited cores.[/b]
--- Quote End ---
I'm just using whatever Altera shipped in the board.

Anyway, I've given up on the Cyclone-II dev, since I've got a real board from the hardware guys now. When I run jtagconfig under Linux I get:
1) USB-Blaster 020B30DD ! 020A10DD !

When the same board is moved to a USBBlaster on a Windows machine, I get this:
1) USB-Blaster (USB-0) 020B30DD EP2C20 020A10DD EPM240

It's the same set of JTAG IDs, so the JTAG end of things is working fine, it's just that jtagconfig and gdb-server don't recognize the JTAG IDs on my Linux box. I still think I'm missing some configuration info that's supposed to go in ~/.jtag.conf. libjtag_client tries to read that file, but it's not there. I'm trying to figure out what the equivalent file is under Windows.

If there is any documentation for the gdb-server that explains what configuration files it needs, feel free to point me in the right direction.
Altera_Forum
Honored Contributor
19 years ago
Hey there!

I think that you're probably seeing things OK. The reason the tool isn't identifying the devices is that you're probably missing a pgm_parts file. You may also want to take a look at the information, regarding this topic, on the Altera web site (http://www.altera.com/support/software/drivers/dri-usb_b-lnx.html). It could be that you don't have correct USB dev permissions set.

I would next try taking a look at the output of 'jtagconfig -n' or 'jtagconfig -d'. It should look something like this:

1) USB-Blaster 020010DD EP1S10 <--- This is your FPGA on the JTAG chain. Node 11104600 <--- This is your JTAG debug module. Node 0C006E00 <--- This is the jtag_uart in my design (you might or might not see this...)

Cheers,

- slacker
Altera_Forum
Honored Contributor
19 years ago
--- Quote Start ---
originally posted by slacker@Oct 30 2006, 01:43 PM
i think that you're probably seeing things ok. the reason the tool isn't identifying the devices is that you're probably missing a pgm_parts file.
--- Quote End ---

Brilliant! That was it.

I didn't have a pgm_parts file in /etc/jtagd. Now it works!

You definitely win a prize. You've saved me from having to install Windows. Seriosly, send me your snail-mail address (grante@visi.com or a forum PM), and I'll send you a company hat or something.
<div class='quotetop'>QUOTE </div>
--- Quote Start ---
You may also want to take a look at the information, regarding this topic, on the Altera web site (http://www.altera.com/support/software/drivers/dri-usb_b-lnx.html). It could be that you don't have correct USB dev permissions set.[/b]
--- Quote End ---

Yup, I had already done that. Otherwise you get a "no JTAG cables available" error (or something like that).
Altera_Forum
Honored Contributor
19 years ago
--- Quote Start ---
originally posted by grante@Oct 30 2006, 02:33 PM
i didn't have a pgm_parts file in /etc/jtagd. now it works!
--- Quote End ---

To be more specific for the benefit of posterity, the missing file was actually /etc/jtagd/jtagd.pgm_parts which appears to be the same as pgm_parts.txt on a Windows setup.
Altera_Forum
Honored Contributor
19 years ago
--- Quote Start ---
originally posted by grante+oct 31 2006, 03:51 am--><div class='quotetop'>quote (grante @ oct 31 2006, 03:51 am)</div>
--- quote start ---
<!--quotebegin-grante@Oct 30 2006, 02:33 PM
i didn't have a pgm_parts file in /etc/jtagd. now it works!
--- Quote End ---

To be more specific for the benefit of posterity, the missing file was actually /etc/jtagd/jtagd.pgm_parts which appears to be the same as pgm_parts.txt on a Windows setup.
<div align='right'><{post_snapback}> (index.php?act=findpost&pid=19032)</div>
[/b]
--- Quote End ---

Would you please add a page on nios wiki to describe how to setup the gdb server?
That would be very helpful. http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/smile.gif
Altera_Forum
Honored Contributor
19 years ago
--- Quote Start ---
originally posted by hippo@Oct 30 2006, 08:16 PM
would you please add a page on nios wiki to describe how to setup the gdb server?
that would be very helpful. http://forum.niosforum.com/work2/style_emoticons/<#emo_dir#>/smile.gif
--- Quote End ---

Will do. There's still a privlege issue I'm trying to figure out. I currently have to run jtagd as root. I tried making it suid root, but that didn't work, I actually have to be logged in as root when I start jtagd. I'll put something up on the Wiki tomorrow even if I haven't figured out the privilege problem.
Altera_Forum
Honored Contributor
19 years ago
--- Quote Start ---
originally posted by hippo@Oct 30 2006, 08:16 PM
would you please add a page on nios wiki to describe how to setup the gdb server?
that would be very helpful. http://forum.niosforum.com/work2/style_emoticons/<#emo_dir#>/smile.gif
--- Quote End ---

Done: http://nioswiki.jot.com/wikihome/linuxgdbserver (http://nioswiki.jot.com/wikihome/linuxgdbserver)

I see that we're encouranged to "sign our work" on the Wiki, but I've no clue what that means or how to do it.

FWIW, my privilege problem was due to the fact that I forgot to make /etc/hotplug/usb/usbblaster executable. Making jtagd suid root didn't work because suid executables ignore the LD_LIBRARY_PATH environment variable.

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gdb-server can't find Cyclone II board

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