Forum Discussion
Altera_Forum
Honored Contributor
19 years ago --- Quote Start --- originally posted by slacker@Oct 30 2006, 12:20 PM the output from your jtagconfig command doesn't look correct.is it possible that any of the ip you have built into your fpga image is time limited? --- Quote End --- I have no clue. I just took the demo board out of the box and plugged it in. I assumed they shipped it configured such that it would work with the USBBlaster that came in the same box. <div class='quotetop'>QUOTE </div> --- Quote Start --- For instance, the Nios II processor can be run in "tethered" mode without a license, but a license is required for any other use of the core. On the Cyclone II Dev. Kit, are you sure you're using one of the included HW examples designs? They should have SOFs based on non-time-limited cores.[/b] --- Quote End --- I'm just using whatever Altera shipped in the board. Anyway, I've given up on the Cyclone-II dev, since I've got a real board from the hardware guys now. When I run jtagconfig under Linux I get:
1) USB-Blaster
020B30DD !
020A10DD ! When the same board is moved to a USBBlaster on a Windows machine, I get this: 1) USB-Blaster (USB-0)
020B30DD EP2C20
020A10DD EPM240 It's the same set of JTAG IDs, so the JTAG end of things is working fine, it's just that jtagconfig and gdb-server don't recognize the JTAG IDs on my Linux box. I still think I'm missing some configuration info that's supposed to go in ~/.jtag.conf. libjtag_client tries to read that file, but it's not there. I'm trying to figure out what the equivalent file is under Windows. If there is any documentation for the gdb-server that explains what configuration files it needs, feel free to point me in the right direction.