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Altera_Forum's avatar
Altera_Forum
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16 years ago

Changing the Size of Data and Instruction Cache

Hello again,

I am trying to increase the data and instruction cache to test if the speed increases when reading data from the UART. At first, I tried making it four times bigger, Quartus said it couldn't fit into the device, so I eliminated the VGA and Audio modules in SOPC (I am not using them). After that I increased Instruction Cache to 8 KBytes, and Data Cache to 4 KBytes, which is the double of what I had by default.

Quartus compiles the project succesfully, and everything is loaded into the FPGA. However, when I open nios2-terminal it never boots correctly, It just freezes after "Uncompressing Linux........ok, booting the kernel" And then nothing happens. I don't know if I should change something in the kernel or app config. Because I've tried so far with different combinations of Data and Instruction Cache sizes, but none of them boots correctly, except for the default values (4K Instruction and 2K data).

Does the Operating System register automatically the size of the cache for both instruction and data? I haven't modified the Cache Line Size, it is still in 4 Bytes.

Does it have anything to do with the Quartus License? I don't think so..

Any configuration trick on Make Menuconfig?

I thought this would be a trivial modification but it turns out it isn't... perhaps I overlooked something but not sure. To be honest, I had never changed the size of these memories.

Any ideas on this please? :S

Regards,

Francisco

12 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Hi, we have changed the size of data and instruction cache many times to optimize speed/fpga size. We have had no boot problems as a result of changing these. Just rebuild the kernel and run. Are you sure you didn't inadvertently change the reset/exception vector addresses. It sounds to me like something is wrong beyond the cache.
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Hello halfdome,

    Thanks for your fast answer. My configuration is the following on SOPC Builder when editing the Nios II Processor.

    Reset Vector= Memory: cfi_flash_0 Offset 0x0

    Exception Vector= Memory sdram_0 Offset 0x20

    Instruction Cache 4 KBytes

    Data Cache 2 KBytes

    Data Cache Line Size 4 Bytes

    Bursts Disabled

    Tightly Coupled master ports disabled.

    Like this, it works correctly. And then I only change the size of either Cache Memories. Regenerate the system, Recompile the project. After that:

    Make vendor_hwselect

    Make romfs

    Make

    and then try to run the OS, and nothing. Perhaps I am missing a step?

    Your help is greatly appreciated.

    Regards,

    Francisco

    News:

    I've made more tests and apparently it starts to boot. It starts to show all the messages that correspond to the normal boot. However, it stops at some point. It is never the same. Sometimes at the USB messages, others at the Ethernet messages. But it never reaches the console.

    There is also one message after "Shell invoked to run file /etc/rc" that says

    Reading Command line: Innapropiate ioctl for device
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Did you check whether any peripheral had its base address/IRQ changed in SoPC Builder? if so, did you run make vendor_hwselect again? I don't know if this would be necessary, but it is one of the first things I'd try.

    Good luck,

    Ricardo.

  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    <div class='quotetop'>QUOTE (jasinski @ Jul 14 2009, 07:33 AM) <{post_snapback}> (index.php?act=findpost&pid=23102)</div>

    --- Quote Start ---

    Did you check whether any peripheral had its base address/IRQ changed in SoPC Builder? if so, did you run make vendor_hwselect again? I don&#39;t know if this would be necessary, but it is one of the first things I&#39;d try.

    Good luck,

    Ricardo.[/b]

    --- Quote End ---

    Hello Ricardo,

    Thank you. Yes, In order to make space for a greater cache (it uses more M4K blocks), I eliminated the VGA module and the Audio Module. Then:

    - Automatically reassigned the base Addresses in SOPC

    - Regenerated the system, and took out the corresponding pins in the top level.

    - Recompiled the project

    - Run vendor_hwselect

    Still nothing. I&#39;ll check if there is an extra PLL for the audio or VGA that I missed just to make sure it is not there.

    Francisco
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Ok, I&#39;m totally guessing now, but are you sure removed all references to the VGA and audio modules from the design?

    Also, if you have not done so already, it may be worthwhile to disable those drivers in the kernel configuration too.

    Good luck,
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Hello,

    Ahh! True! Good idea! I&#39;ll look for them right away. I wasn&#39;t working with them previously so I just assumed they were not there. However, I will check if they are not enabled.

    Francisco
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Hello again halfdome, and everyone

    So I&#39;ve checked the drivers on the kernel config. Audio Support as well as video support were already disabled.

    On the Quartus project, I eliminated an Audio PLL because it wasn&#39;t being used anymore.

    Still getting the same results. With 4K Instruction and 2K Data Cache Memories(original settings), it works normally, however, when changing to bigger sizes, it doesn&#39;t work.

    what board are you using? I am using a DE2. And also, when you modify to increase the cache size, do you do steps other than recompiling? Perhaps some obvious steps but since I had never done this I am not doing them.

    Thanks

  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Maybe I&#39;ve got it... After you build the new hardware image are you loading it into the board?

    vendor_hwselect tells the kernel build which hardware to target but it does not put the hardware into your DE2 board.

    you would need to run nios2-configure-sof or something to get the new image into the board. If you are not doing this, the kernel would think it had more cache than the HW actually has.

    That could be an issue :).

    Also, you probably don&#39;t need to do this but I always make clean when I&#39;m changing hardware.

    Hope this helps.

  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    <div class='quotetop'>QUOTE (halfdome @ Jul 14 2009, 05:44 PM) <{post_snapback}> (index.php?act=findpost&pid=23119)</div>

    --- Quote Start ---

    Maybe I&#39;ve got it... After you build the new hardware image are you loading it into the board?

    vendor_hwselect tells the kernel build which hardware to target but it does not put the hardware into your DE2 board.

    you would need to run nios2-configure-sof or something to get the new image into the board. If you are not doing this, the kernel would think it had more cache than the HW actually has.

    That could be an issue :).

    Also, you probably don&#39;t need to do this but I always make clean when I&#39;m changing hardware.

    Hope this helps.[/b]

    --- Quote End ---

    Hello halfdome,

    I am loading the Hardware every time to the board, because I&#39;m testing with volatile memory. I&#39;m not permanently loading the configuration to the FPGA -at least not yet-. However, the cleaning process would be interesting to try. Could you tell me how to do that? And in which step do you do the cleaning?

    What I do is :

    Change Cache size in SOPC Builder

    Regenerate

    Recompile

    Make vendor_hwselect

    Make

    Make linux image

    nios2-configure-sof

    nios2-download -g

    nios2-terminal

    also, do you think you could enlist what you do when changing these memories? You mentioned earlier that you &#39;ve had no problem with that. please? :D

    Regrds,

    FRancisco