Changing the Size of Data and Instruction Cache

Hello halfdome,

Thanks for your fast answer. My configuration is the following on SOPC Builder when editing the Nios II Processor.

Reset Vector= Memory: cfi_flash_0 Offset 0x0

Exception Vector= Memory sdram_0 Offset 0x20

Instruction Cache 4 KBytes

Data Cache 2 KBytes

Data Cache Line Size 4 Bytes

Bursts Disabled

Tightly Coupled master ports disabled.

Like this, it works correctly. And then I only change the size of either Cache Memories. Regenerate the system, Recompile the project. After that:

Make vendor_hwselect

Make romfs

Make

and then try to run the OS, and nothing. Perhaps I am missing a step?

Your help is greatly appreciated.

Regards,

Francisco

News:

I've made more tests and apparently it starts to boot. It starts to show all the messages that correspond to the normal boot. However, it stops at some point. It is never the same. Sometimes at the USB messages, others at the Ethernet messages. But it never reaches the console.

There is also one message after "Shell invoked to run file /etc/rc" that says

Reading Command line: Innapropiate ioctl for device