Cyclone 10 GX Nios V Ethernet Ping Issue - UC/TCP-IP Error 20012 and TSE/mSGDMA Debugging ;

Hello ,

I am developing Ethernet communication on a Cyclone 10 GX FPGA using Nios V/m, the Triple-Speed Ethernet (TSE) IP, msgDMA, a Marvell Alaska 88E1111 PHY, UC-OS-II, and the recommended UC-TCP-IP software components.  I am using the recommended UC/TCP-IP .c and .h source files, but I am facing an initialization error before I can complete ping testing.

Hardware/software configuration: FPGA: Cyclone 10 GX, Processor: Nios V/m at 50 MHz, Quartus Prime Pro: 26.1.0, Ethernet: TSE with TX/RX mSGDMA, PHY: Marvell Alaska 88E1111 over SGMII, Network stack: UC/TCP-IP, RTOS: UC/OS-II, Board IP: 10.0.0.2/24, PC-to-board ping: Not working

Current initialization error

The network initialization fails at: NetSock_Init(&err); The returned error is:  NET_SOCK_ERR_INIT_CONN_REQ_FAULT (20012)

I am using the recommended MicroC/TCP-IP source files with MicroC/OS-II. Before calling NetSock_Init(&err), the following initialization functions execute successfully:

Net_InitDflt(); NetCtr_Init(); NetStat_Init(); Net_KAL_Init(); NetTmr_Init(); NetBuf_Init(); NetConn_Init(); NetMgr_Init(&err); NetICMP_Init(&err); NetIP_Init(&err); NetIGMP_Init(); NetUDP_Init(); NetTCP_Init(&err);

After these initialization functions complete, I call: NetSock_Init(err); 

While debugging the recommended KAL implementation, I found that semaphore creation fails inside NetSock_Init(): 

p_sem = OSSemCreate(0u

if (p_sem == (OS_EVENT *)0) { *p_err = RTOS_ERR_CREATE_FAIL; return (handle); }

The eighth call to OSSemCreate(0u) specifically within NetSock_Init() returns NULL. The preceding calls return valid semaphore pointers.

OS_MAX_EVENTS = 60   OS_LOWEST_PRIO = 80

Additional debugging information – MDIO and PHY detection

I have also verified MDIO access to both the internal PCS and the external Marvell Alaska 88E1111 PHY. MDIO space 0: Internal PCS registers. MDIO space 1: External Marvell 88E1111 PHY registers.

I can successfully read the registers from both spaces. The external PHY identification registers return PHY ID1 = 0x0141 and PHY ID2 = 0x0CC2. This confirms that I can access the internal PCS and identify the external PHY through MDIO. However, the complete Ethernet packet path and ping communication are not yet verified.

TSE MAC debugging : I have verified access to the TSE MAC registers and checked the MAC configuration registers, including COMMAND_CONFIG, MAC address registers, frame length, pause settings, and inter-packet gap.

TX/RX mSGDMA debugging: I have separate TX and RX mSGDMA controllers, descriptor memory, and descriptor prefetchers configured in Platform Designer.

TSE: 0x00112000, TX mSGDMA CSR: 0x00112480, RX mSGDMA CSR: 0x001124A0, TX descriptor prefetcher: 0x00112440, RX descriptor prefetcher: 0x00112460, Descriptor memory: 0x00110000

I have verified descriptor-memory read/write access using test patterns. However, I have not yet confirmed that complete TX and RX packet transfers work correctly.

I need guidance on validating the descriptor format, buffer addresses, descriptor ownership, DMA status registers, and completion/error status. I would also like to know the recommended procedure for validating TX and RX independently before integrating them with the TCP/IP stack.

My current blocking issue is MicroC/TCP-IP initialization error 20012 (NET_SOCK_ERR_INIT_CONN_REQ_FAULT).

During debugging, I found that the eighth OSSemCreate(0u) call within NetSock_Init() returns NULL, causing semaphore creation to fail.

I would like to understand why semaphore creation fails even though the recommended networking source files are being used.

Thank you,