M_T
New Contributor
9 months agomSGDMA Data Loss Between Descriptors (Streaming to Memory-Mapped)
We're experiencing consistent data loss when using Altera's mSGDMA IP on an Arria 10 device for streaming data from the FPGA fabric to DDR memory (accessible by the HPS).
Issue Description
- Data is being lost between consecutive descriptor transfers
- Typically missing ~80 bytes between transfers, occasionally less (~32 bytes)
- The data loss occurs even when multiple descriptors are queued in the descriptor FIFO
- The loss pattern seems somewhat consistent but not entirely predictable
System Configuration
- Arria 10 SoC with HPS running Yocto Linux (based on GSRD)
- mSGDMA Configuration:
- Mode: Streaming to Memory-Mapped
- Data width: 32-bit
- Data FIFO depth: 1024
- Descriptor FIFO depth: 128
- Maximum burst count: 16
- Maximum transfer length: 1024 bytes
- Packet mode: Disabled
- Prefetch: Disabled
- Bus frequency: 200MHz (HPS running at 1GHz)
Additional Details
- We're using a driver based on https://github.com/pavelfpl/altera_msgdma_st
- The data source is a test logic that produces streams of consecutive 32-bit numbers
- The source pushes blocks of numbers once every few microseconds
- Data transfers are working but we're consistently losing data between descriptors
- No error bits are set in the status register after transfers
- We're not currently using packet mode, park reads, or prefetch features
Has anyone encountered similar issues or have suggestions for what might be causing this data loss?
Thanks for any insights.