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  • Altera_Forum's avatar
    Altera_Forum
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    I found the problem.

    I started to think more about the Surce_valid output.

    The problem was that the output start after two cycles of FFT and "some delay": in my case the Souce_ready go up after 536 cycles of clock, 256+256+24.

    This delay creates issues in SIMULINK because the output buffer and so the vector scope start to display datas with a 24 clock delay: this is the cause of the spectrum shift displayed .

    I inserted a 232 delay before the output and so the ouput is syncronyzed with a FFT cycle delay. (But the purpose was to have an understandable right output so the issue is acceptable and my objective is accomplished).

    To avoid the one cycle delay I thought about insert a sort of trigger or switch in order to let flow the datas to the buffer only when the Source Valid goes on but I haven't find useful to me till now...

    Another thing to do is also to adjust the amplitude. Maybe there is an error inside the second power spectrum, I don't think i had to divide by 256 because the signal is not vectored before the buffer...but..

    I post the new scheme and the new file, I hope it can be useful also to other people.

    PS: do you know if I need a new license to update my Quartus and my DSP builder from 7.2 to 8.1?

    http://img399.imageshack.us/img399/5143/schemaprogettorq5.jpg
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    Should be pretty easy to update your license from 7.2 to 8.1. Depends on what type of license you have. But I believe you can easily update your license to a newer version within the original one year window... with that said, I would suggest checking with your FAE or filing a service request with Altera to update your DSP Builder...

  • Altera_Forum's avatar
    Altera_Forum
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    Hi again,

    in those days I tried to adjust last things and also to recreate the input signal with an IFFT.

    On the file I posted some time ago, I tried to adjust the FFT amplitude that was less then the Matlab one.

    I found some trouble with the exponent value again. I will post the text where it speaks about the FFT scaling.

    " the exponent records the number of left or right shifts used to perform the scaling. as

    a result, the output magnitude relative to the input level is:

    output*2-exponent

    for example, if exponent = –3, the input samples are shifted right by

    three bits, and hence the magnitude of the output is output*2^3 "

    To scale I shifted the real and imaginary output. I found a negative exp so a made a right shift as the example. But...

    The result is that everything turns really good when I not scale the real and imaginary output. It seem to be futile to scale it!

    Also when I try to recreate the input signal with the IFFT everything is good without the scaling....

    ..mmm i missed something?

    I will post the new scheme that bypass the scaling.

    http://img147.imageshack.us/img147/8247/fftsitosc7.jpg
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    Hi again,

    For signed data of a given width, if you want to scale any signed value by 2^n then you should shift magnitude bits towards MSB (n) bits inserting zeros in new LSBs(leading zeros). The sign bit should stay. Ofcourse the datawidth should accomodate these new bits.

    If you want to scale by 2^-n you shift magnitude bits towards LSB (n) bits and insert the sign bit in new MSBs(sign extension).

    I hope that's what you mean.

    kaz