Cyclone IV GX project failed migration from 20.1 to 23.1std
I am currently facing an issue with the conversion of an Intel IP while migrating from Quartus version 20.1 to version 23.1std. Despite following the references {1} {2} and {3}, I have encountered the following error:
Error: altgx_internal: error renaming "C:/intelfpga_lite/23.1std/quartus/../ip/altera/altera_pcie/altera_pcie_avmm/lib/altpcie_serdes_3cgx_x1d_gen1_08p.v.new" to "C:/intelfpga_lite/23.1std/quartus/../ip/altera/altera_pcie/altera_pcie_avmm/lib/altpcie_serdes_3cgx_x1d_gen1_08p.v": best guess at reason: permission denied
while executing
"file rename -force $temp $filename "
(procedure "my_generation_callback" line 91)
invoked from within
"my_generation_callback"
Error: altgx_internal: Generation callback did not provide a top level file (expected `add_file $output_dir/system_plus_pcie_altgx_internal.v|vhd|sv {SIMULATION SYNTHESIS}`)
Error: Generation stopped, 636 or more modules remaining
Error: qsys-generate failed with exit code 1: 3 Errors, 48 Warnings
I have attempted various solutions, but none seem to resolve the issue. Your insights and guidance on how to address this problem would be highly appreciated.
{1} https://community.intel.com/t5/Intel-Quartus-Prime-Software/Cyclone-IV-GX-project-failed-migration-from-18-1-to-20-1/m-p/1496532
{2} https://www.terasic.com.tw/wiki/Fix_Known_Issues_Quartus_QSYS_regenerating_error
{3} https://community.intel.com/t5/FPGA-Intellectual-Property/Using-Quartus-19-1-and-Platform-Designer-on-Windows-I-get-an/td-p/668852