Agilex‑7 F‑Tile Dynamic Reconfiguration Conflict Between HDMI and SDI RX
Hello,
I am working on a design targeting an Agilex‑7 device (AGFB014R24C2I2V) using Quartus Prime Pro 23.2. The design includes two video RX interfaces on the same F‑Tile, both configured as input-only:
- HDMI (TMDS only)
- SDI‑12G
Both IP cores use dynamic reconfiguration to adapt the transceiver to the detected input frequency:
- HDMI: Mixed single-rate PHY (63 profiles)
- SDI: Multi-rate PHY (4 profiles)
Since both IPs are located in the same F‑Tile, they share:
- A single dynamic reconfiguration block (through the arbiter from the provided IP example)
- The same System PLL
Observed Behavior
- When only one RX IP is instantiated (either HDMI or SDI), the link comes up correctly and video is received as expected.
- When both RX IPs are instantiated simultaneously:
- HDMI link initializes and operates correctly.
- SDI PHY fails to lock to the input signal.
Debug Observations
Using SignalTap on the dynamic reconfiguration interface:
- The SDI reconfiguration state machine cycles through all profiles.
- Each reconfiguration completes successfully (no errors reported).
- Despite this, the SDI RX never achieves lock.
Suspected Cause
This appears to be potentially related to a resource conflict or incorrect sharing configuration within the F‑Tile, possibly due to QSF assignments or transceiver resource allocation.
However, the exact root cause is unclear, and I may be overlooking a configuration requirement for:
- Shared dynamic reconfiguration usage
- Multi‑client arbitration
- F‑Tile resource partitioning
Additional Information
Below are the QSF assignments used to configure the dynamic reconfiguration IP. For brevity, only the first and last HDMI profiles (out of 63) are included.
# Configure global assignments for SytemPLL
set_location_assignment PIN_BH8 -to REFCLKIN_HDMI_13A -comment "Pin Function Name is REFCLK_FGTR13A_Q0_RX_CH0P"
set_location_assignment PIN_BJ7 -to "REFCLKIN_HDMI_13A(n)"
set_instance_assignment -name IO_STANDARD "CURRENT MODE LOGIC (CML)" -to REFCLKIN_HDMI_13A -entity iWave_HelloWorld
set_location_assignment PIN_BP8 -to REFCLKIN_100M_13A -comment "Pin Function Name is REFCLK_FGTR13A_Q1_RX_CH3P"
set_location_assignment PIN_BN7 -to "REFCLKIN_100M_13A(n)"
set_instance_assignment -name IO_STANDARD "CURRENT MODE LOGIC (CML)" -to REFCLKIN_100M_13A -entity iWave_HelloWorld
set_location_assignment PIN_CJ7 -to REFCLKIN_148M5_13A -comment "Pin Function Name is REFCLK_FGTR13A_Q3_RX_CH6P"
set_location_assignment PIN_CH8 -to "REFCLKIN_148M5_13A(n)"
set_instance_assignment -name IO_STANDARD "CURRENT MODE LOGIC (CML)" -to REFCLKIN_148M5_13A -entity iWave_HelloWorld
set_instance_assignment -name IP_TILE_ASSIGNMENT Z1577B_X339_Y0_N0 -to U_VideoIn|U_MGT_SUPPORT.U_PLL|systemclk_f_0 -entity iWave_HelloWorld
set_instance_assignment -name IP_BB_LOCATION FGT_REFCLK_0 -to U_VideoIn|U_MGT_SUPPORT.U_PLL|systemclk_f_0|x_hip|gen_refclk_fgt_bb_[0].enabled.inst -entity iWave_HelloWorld -comment "Device Location is x_z1577b|ux_refclk|ux_refclk0"
set_instance_assignment -name IP_BB_LOCATION FGT_REFCLK_3 -to U_VideoIn|U_MGT_SUPPORT.U_PLL|systemclk_f_0|x_hip|gen_refclk_fgt_bb_[3].enabled.inst -entity iWave_HelloWorld -comment "Device Location is x_z1577b|ux_refclk|ux_refclk3"
set_instance_assignment -name IP_BB_LOCATION FGT_REFCLK_6 -to U_VideoIn|U_MGT_SUPPORT.U_PLL|systemclk_f_0|x_hip|gen_refclk_fgt_bb_[6].enabled.inst -entity iWave_HelloWorld -comment "Device Location is x_z1577b|ux_refclk|ux_refclk6"
# Configure global assignments for dynamic reconfig
set_instance_assignment -name IP_TILE_ASSIGNMENT Z1577B_X339_Y0_N0 -to U_VideoIn|U_MGT_SUPPORT.U_Reconfig|dr_f_0 -entity iWave_HelloWorld
set_global_assignment -name IP_RECONFIG_GROUP_TYPE "MASTER_DR:INCLUSIVE" -entity iWave_HelloWorld
# HDMI DR
set_global_assignment -name IP_RECONFIG_GROUP_PARENT "MASTER_DR:VIDEOINPUT0_DR" -entity iWave_HelloWorld
set_global_assignment -name IP_RECONFIG_GROUP_TYPE "VIDEOINPUT0_DR:EXCLUSIVE:SHARED_SIP:CLK_MASTER" -entity iWave_HelloWorld
set_instance_assignment -name IP_RECONFIG_GROUP_MASTER_CLOCK_CHANNEL PLD_PCS_RX_CLK_OUT1_DCM -to U_VideoIn|U_INPUT_0|U_HDMI_TMDS.U1|U_HDMI|gxb_rx_inst|u_rx_phy_0|rx_phy_12g|dphy_hip_inst|persystem[0].perxcvr[0].peraib[0].rx_aib.x_bb_m_hdpldadapt_rx -entity iWave_HelloWorld
set_instance_assignment -name IP_RECONFIG_GROUP_STARTUP_INSTANCE ON -to U_VideoIn|U_INPUT_0|U_HDMI_TMDS.U1|U_HDMI|gxb_rx_inst|u_rx_phy_0|rx_phy_12g
set_instance_assignment -name IP_RECONFIG_GROUP_SHARED_SIP ON -to U_VideoIn|U_INPUT_0|U_HDMI_TMDS.U1|U_HDMI|gxb_rx_inst|u_rx_phy_0|rx_phy_12g
set_instance_assignment -name IP_RECONFIG_GROUP VIDEOINPUT0_DR -to U_VideoIn|U_INPUT_0|U_HDMI_TMDS.U1|U_HDMI|gxb_rx_inst|u_rx_phy_0|rx_phy_12g -entity iWave_HelloWorld
...
set_instance_assignment -name IP_RECONFIG_GROUP VIDEOINPUT0_DR -to U_VideoIn|U_INPUT_0|U_HDMI_TMDS.U1|U_HDMI|gxb_rx_inst|u_rx_phy_62|rx_phy_0p300g -entity iWave_HelloWorld
set_instance_assignment -name IP_COLOCATE F_TILE -from U_VideoIn|U_MGT_SUPPORT.U_Reconfig|dr_f_0 -to U_VideoIn|U_INPUT_1|U_HDMI_TMDS.U1|U_HDMI|gxb_rx_inst|u_rx_phy_0|rx_phy_12g -entity iWave_HelloWorld
...
set_instance_assignment -name IP_COLOCATE F_TILE -from U_VideoIn|U_MGT_SUPPORT.U_Reconfig|dr_f_0 -to U_VideoIn|U_INPUT_1|U_HDMI_TMDS.U1|U_HDMI|gxb_rx_inst|u_rx_phy_62|rx_phy_0p300g -entity iWave_HelloWorld
set_instance_assignment -name IP_RECONFIG_ID 101 -to U_VideoIn|U_INPUT_1|U_HDMI_TMDS.U1|U_HDMI|gxb_rx_inst|u_rx_phy_0|rx_phy_12g -entity iWave_HelloWorld
...
set_instance_assignment -name IP_RECONFIG_ID 163 -to U_VideoIn|U_INPUT_1|U_HDMI_TMDS.U1|U_HDMI|gxb_rx_inst|u_rx_phy_62|rx_phy_0p300g -entity iWave_HelloWorld
# SDI DR
set_global_assignment -name IP_RECONFIG_GROUP_PARENT "MASTER_DR:VIDEOINPUT1_DR" -entity iWave_HelloWorld
set_global_assignment -name IP_RECONFIG_GROUP_TYPE "VIDEOINPUT1_DR:EXCLUSIVE:CLK_MASTER" -entity iWave_HelloWorld
set_global_assignment -name IP_RECONFIG_GROUP_PARENT "VIDEOINPUT1_DR:U_VideoIn|U_INPUT_1|U_SDI.U3|U_SDI|sdi_mr_rx_sys_inst|rx_phy|rx_phy/RG_A_E" -entity iWave_HelloWorld
set_instance_assignment -name IP_COLOCATE F_TILE -from U_VideoIn|U_MGT_SUPPORT.U_Reconfig|dr_f_0 -to U_VideoIn|U_INPUT_1|U_SDI.U3|U_SDI|sdi_mr_rx_sys_inst|rx_phy|rx_phy -entity iWave_HelloWorld
set_instance_assignment -name IP_RECONFIG_ID 164 -to U_VideoIn|U_INPUT_1|U_SDI.U3|U_SDI|sdi_mr_rx_sys_inst|rx_phy|rx_phy
set_instance_assignment -name IP_RECONFIG_GROUP_MASTER_CLOCK_CHANNEL PLD_PCS_RX_CLK_OUT1_DCM -to U_VideoIn|U_INPUT_1|U_SDI.U3|U_SDI|sdi_mr_rx_sys_inst|rx_phy|rx_phy|U_base_profile|directphy_f_0|dphy_hip_inst|persystem[0].perxcvr[0].peraib[0].rx_aib.x_bb_m_hdpldadapt_rx -entity iWave_HelloWorldGenerated Reconfiguration IDs
After support logic generation, the IDs are correctly reflected:
#define NUM_IP_INSTS 67
#define IWAVE_HELLOWORLD__U_VIDEOIN__U_INPUT_0__U_HDMI_TMDS__U1__U_HDMI__GXB_RX_INST__U_RX_PHY_0__RX_PHY_12G 101
...
#define IWAVE_HELLOWORLD__U_VIDEOIN__U_INPUT_0__U_HDMI_TMDS__U1__U_HDMI__GXB_RX_INST__U_RX_PHY_62__RX_PHY_0P300G 163
#define IWAVE_HELLOWORLD__U_VIDEOIN__U_INPUT_1__U_SDI__U3__U_SDI__SDI_MR_RX_SYS_INST__RX_PHY__RX_PHY__U_BASE_PROFILE__DIRECTPHY_F_0 164
#define IWAVE_HELLOWORLD__U_VIDEOIN__U_INPUT_1__U_SDI__U3__U_SDI__SDI_MR_RX_SYS_INST__RX_PHY__RX_PHY__U_SEC_PROFILE1__SEC_PROFILE_1 165
#define IWAVE_HELLOWORLD__U_VIDEOIN__U_INPUT_1__U_SDI__U3__U_SDI__SDI_MR_RX_SYS_INST__RX_PHY__RX_PHY__U_SEC_PROFILE2__SEC_PROFILE_2 166
#define IWAVE_HELLOWORLD__U_VIDEOIN__U_INPUT_1__U_SDI__U3__U_SDI__SDI_MR_RX_SYS_INST__RX_PHY__RX_PHY__U_SEC_PROFILE3__SEC_PROFILE_3 167Any guidance on:
- Proper sharing of dynamic reconfiguration between multiple RX IPs on the same F‑Tile
- Known limitations or requirements for mixing HDMI (TMDS) and SDI PHYs
- QSF settings that could cause this behavior
would be greatly appreciated.
Thank you.