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Dhiraj's avatar
Dhiraj
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1 month ago

Accessing registers in the PCIE IP beyond MCDMA using system console

Hi,

I have compiled the MCDMA IP (R-Tile based) in EP mode. I have a custom controller IP interfaced with MCDMA IP. There is a CSR Lite Interface on the port list which is a master interface.

I have a JTAG to Avalon master bridge through which I want to access the registers in the MCDMA as well as the controller beyond the MCDMA. 

As JTAG is a master interface and the CSR Lite is also a master interface, they can't be interfaced together.

Please suggest how can I interface the JTAG master so that I can access the registers inside the controller as well as MCDMA IP.

Also is there any way to access the registers inside MCDMA IP without using JTAG to Avalon master bridge?

8 Replies

  • VenT_Altera's avatar
    VenT_Altera
    Icon for Frequent Contributor rankFrequent Contributor

    Hi Dhiraj 

    Thanks for reaching out.
    May I ask which user mode you selected for the R-Tile MCDMA IP?

    Thanks.
    Best Regards,
    Ven

  • Dhiraj's avatar
    Dhiraj
    Icon for New Contributor rankNew Contributor

    Hi Ven,

    It is generated on the user mode BAM+BAS+MCDMA. Please let me know if any other details are required.

    • VenT_Altera's avatar
      VenT_Altera
      Icon for Frequent Contributor rankFrequent Contributor

      Hi Dhiraj,

      Thanks for the prompt response.  

      To clarify, when you mention the CSR Lite Interface, are you referring to the Customer Controller IP?

      Using JTAG to Avalon master bridge, you can read/write PCIe registers via System Console. Besides, you can access also access to PCIe registers using the PIO application; see the PIO test design example available in the user guide: https://docs.altera.com/r/docs/683517/25.3.1/multi-channel-dma-ip-for-pci-express-design-example-user-guide/pio-test?tocId=OPMbp2IdYG0_k5YePwu5vQ

      Alternatively, a Nios processor can be used to access the PCIe registers. While there is no demo example available currently, refer to the Nios processor handbook for guidance. You can also use the lspci Linux command utility to read/write the PCIe register.

      Thanks.
      Best Regards,
      Ven

      • Dhiraj's avatar
        Dhiraj
        Icon for New Contributor rankNew Contributor

        Hi Ven,

        I am analyzing the example design at my side. I will get back to you soon with the updates. Thanks for sharing the information.