How to chose our PCIe implemenation solutions, Avalon-MM or Avalon-ST?

Hi ,

I am Wincent, Application Engineer from Altera,

We sincerely apologize for the inconvenience caused by the delay in addressing your Forum queries.

Due to an unexpected back-end issue in our system, your Forum case, did not reach us as intended.

Answering your question,

Here are the key differences between them:

• Purpose:
  • Avalon-ST: This interface is designed for high-speed data streaming applications. It is typically used for connections that require a continuous flow of data, such as audio or video processing, where data is sent in a stream with a known data rate.
  • Avalon-MM: This interface is used for memory-mapped transactions, where data is read from or written to specific addresses. It is suitable for control and status operations, where a master component communicates with slave components using read and write transactions.
• Data Transfer:
  • Avalon-ST: Data is transferred in a streaming fashion, often without explicit addressing. The interface usually includes signals for valid data, ready to accept data, and data itself, along with optional channels for sideband information like error or channel identifiers.
  • Avalon-MM: Data transfer is address-based, meaning each data transfer is associated with a specific address. The interface includes signals for read and write operations, address lines, data lines, and handshaking signals like wait request and write acknowledge.
• Complexity:
  • Avalon-ST: The streaming interface is relatively simple and does not require complex control logic for addressing. It is optimized for low-latency and high-throughput scenarios.
  • Avalon-MM: The memory-mapped interface is more complex due to the need for address decoding and the handling of read/write operations. It is optimized for flexibility and ease of integration with memory-mapped devices.
• Use Cases:
  • Avalon-ST: Commonly used in digital signal processing (DSP) applications, video processing pipelines, and any scenario where data needs to be processed as it arrives without the need for random access.
  • Avalon-MM: Typically used for interfacing with peripherals, memory devices, and processors where random access to different registers or memory locations is required.
• PCIe (Peripheral Component Interconnect Express) Integration:
  • Avalon-ST: When integrated with PCIe, Avalon-ST interfaces can be used for streaming data directly to or from the PCIe bus, which is useful for applications like video capture or playback cards.
  • Avalon-MM: When used with PCIe, Avalon-MM interfaces can be used to map the FPGA's internal registers or memory to the PCIe address space, allowing a host CPU to access these resources as if they were part of its own memory space.

In summary, Avalon-ST is optimized for streaming data without the need for addressing, while Avalon-MM is designed for random access read/write operations with specific addresses. The choice between the two depends on the specific requirements of the FPGA application and the nature of the data being transferred.

Hope that clarified and able to help you to proceed further.

Regards,

Wincent_Intel

Hi,

We do apologize for the previous system down issue causing your question been delay in addressing.

Hope my previous response is not too late in order to solve your queries.

I wish to follow up with you about this case. Do you have any further questions on this matter ?

​​​​​​​Else I would like to have your permission to close this forum ticket.

Regards,

Wincent_Intel

Hello Wincent,

We are in a long holiday in China now, so I can only quick check the website. I want to verify pcie ref-design example in c10gx devkit board. I have download it from Intel website(here:https://www.intel.com/content/www/us/en/design-example/714943/intel-cyclone-10-gx-fpga-pcie-2-0-x4-avalon-streaming-design-example.html ), however, I can't open it on my local computer. It seems .par file, instead of .qar file. Can you teach me how to use it?

BTW, I know that Altera introduced to user their pcie avst ref-design. If remember correctly, it was named as high performance ref-design. And there is an456 paper. But above c10gx avst ref-design following with an855 document. What's the different between them? And also, high performance ref-design seems not support to c10.

Hi,
AN855 is old 8 targetting to Quartus 18), but AN456 is much older. This should answer your question which to choose.

.par design archives are not regularly associated with Quartus, but cam be easily opened in Quartus. Start Quartus Prime Pro, go to open project, select respective .par file.

Recent Quartus PCIe IP has major changes to Quartus 18. I remember that it was suggested in some cases to rebuild it from the scratch instead of just upgrading it. But it seems that the design example still compiles in recent versions.