Occasional Contributorcompile error in A10 PCIe hard IP
I am getting this error message when elaborating a PCIe hard IP core with Avalon MM interface (build as a Qsys block with Platform Designer)
Error(13224): Verilog HDL or VHDL error at altpcieav_dma_hprxm_rdwr.sv(1543): index -1 is out of range [63:0] for 'rxm_address_reg'
The hierarchical structure looks like this:
module pcie_core_pcie_a10_hip_0_altera_pcie_a10_hip_181_7tjtnma (
. . .
);
. . .
parameter bar2_address_width_mux_hwtcl = 0;
. . .
localparam avmm_bar2_size_mask = bar2_address_width_mux_hwtcl;
. . .
altpcieav_256_app #(
. . .
.BAR2_SIZE_MASK (avmm_bar2_size_mask),
. . . )
module altpcieav_256_app (
. . .
);
. . .
parameter BAR2_SIZE_MASK = 1;
. . .
altpcieav_dma_hprxm #(
. . .
.BAR2_SIZE_MASK (BAR2_SIZE_MASK),
. . . )
module altpcieav_dma_hprxm (
. . .
);
. . .
parameter BAR2_SIZE_MASK = 20;
altpcieav_dma_hprxm_rdwr #(
. . .
.BAR2_SIZE_MASK(BAR2_SIZE_MASK)
. . . )
module altpcieav_dma_hprxm_rdwr (
. . .
);
. . .
parameter HPRXM_BAR_TYPE = 64;
. . .
parameter BAR2_SIZE_MASK = 20;
. . .
assign HPRxmAddress_o = { {(HPRXM_BAR_TYPE-BAR2_SIZE_MASK ){1'b0}}, rxm_address_reg[BAR2_SIZE_MASK -1:0] };
pcie_core_pcie_a10_hip_0_altera_pcie_a10_hip_181_7tjtnma
instantiates altpcieav_256_app, which instantiates altpcieav_dma_hprxm, which instantiates altpcieav_dma_hprxm_rdwr. The error is in the assignment statement:
assign HPRxmAddress_o = { {(HPRXM_BAR_TYPE-BAR2_SIZE_MASK ){1'b0}}, rxm_address_reg[BAR2_SIZE_MASK -1:0] };
Apparently the index for rxm_address_reg is -1, which is due to setting BAR2_SIZE_MASK to 0 at the top of the hierarchy.
I do not see this problem if I build the PCIe core from the IP catalog, but we are having sim problems with that approach.
Is this a known bug?
Thanks.
