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Altera_Forum
Honored Contributor
Honored Contributorburst count
Hi,everybody
Will you please explain what's the "Local maximum burst count" meaning in the DDR IP Controller setttings? If I don't use the avalon-bus ,can I use the burst count function? Thank you for you answer~~ Best regards, ANGEL15 Replies
Altera_ForumDear BadOmen,
Will you please help me explain what's the "reads_remaining" mean in the following code which is from example driver generated by the controller IP? why the reads_remaining +(size-1) when local_rdata_valid is high, and why reads_remaining+size when local_rdata_valid is low... thank you~~~- Altera_Forum
reads_remaining:
if ((read_req | p_read_req) & local_ready) begin if (local_rdata_valid) reads_remaining <= reads_remaining + (size - 1); else reads_remaining <= reads_remaining + size; end else if ((local_rdata_valid) & (reads_remaining > 0)) reads_remaining <= reads_remaining - 1'b1; else reads_remaining <= reads_remaining; - Altera_Forum
If I had to guess it is tracking how many outstanding reads are issued to the memory controller in terms of beats (words). So you can post read accesses to the memory and after a handful of clock cycles the read data returns. So this is a counter that is counting down by 1 when read data returns and counts up when 'size' (burst size) is issued.
It's common to build this type of logic into a read master in SOPC Builder/Qsys as well since you normally have a FIFO internally to catch the data so knowing how many reads are posted allows you to back pressure to avoid overflowing the FIFO. - Altera_Forum
Dear BadOmen,
I think your guess is right, and I understand it through the simulation wave~ Thanks! Then, when I compile my project ,there is a critical warning "Critical Warning: Fitter could not properly route signals from DQ I/Os to DQ capture registers because the DQ capture registers are not placed next to their corresponding DQ I/Os" . Should I take more attention on the DQ assignment? And how can I avoid the warning? Appriciated~~~ - Altera_Forum
Did you remember to run the constraints .tcl script generated for the SDRAM controller as well as add the generated .sdc (timequest) file to your project? If not I would read the controller documentation since it goes through what you need to do step by step.
