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Sumanth's avatar
Sumanth
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3 months ago

Timing Behavior of Remote Update IP After Reset on Cyclone 10 GX (10CX150YF672E5G)

I am using the Remote Update IP with the Cyclone 10 GX FPGA, part number 10CX150YF672E5G. I observed that the Remote Update IP does not respond properly after reset until approximately 300 µs. I expe...
Configuration
Core Logic
Programmable Logic Device
Sumanth's avatar
Sumanth
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1 month ago

In our design, the watchdog timer is enabled only while loading the application image. We use a remote IP clock with a 10 MHz frequency. The watchdog timeout value is set to 0x138, which corresponds to approximately 2 seconds.

When the current configuration is the application image, the watchdog timer (reset_timer) is reset every 3.2 milliseconds.

Note: The issue I observed occurs before the application image is triggered, specifically while reading the reconfiguration trigger conditions.

Regards,
Sumanth S

  • Farabi's avatar
    Farabi
    Icon for Regular Contributor rankRegular Contributor
    17 days ago

    Hello, 

     

    On Cyclone 10GX, the device does not immediately enter user mode after configuration. In datasheet: tCD2UM is around 175us to 830us. 

    The root cause of your failure migt be caused by you are reading the Remote Update Registers before the device has entered User mode. 
    Recommendation - you must not interact with user logic until INIT_DONE goes high. 

    The all 1's you are observing is expected when reading any uninitialized Avalon-MM register space. 

     

    regards,

    Farabi