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Sumanth's avatar
Sumanth
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9 months ago

Timing Behavior of Remote Update IP After Reset on Cyclone 10 GX (10CX150YF672E5G)

I am using the Remote Update IP with the Cyclone 10 GX FPGA, part number 10CX150YF672E5G. I observed that the Remote Update IP does not respond properly after reset until approximately 300 µs. I expe...
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Core Logic
Programmable Logic Device
Sumanth's avatar
Sumanth
Icon for Occasional Contributor rankOccasional Contributor
9 months ago

Thanks for the suggestions. 

Related to the recommendation:
In my code it is already taken care to check IP's busy signal before doing any read operation. 

During the reset, whether remote update IP will assert busy signal until initialization is complete?

Is there any other mechanism to know that remote update IP is ready?

Thank you.