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Altera_Forum's avatar
Altera_Forum
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14 years ago

SDRAM for Image Processing

HI...

I'm working on an image processing system and everything goes fine, but when i read my data out from the sdram i receive a lot of garbage data... then two big vertical lines appeared in my results.

i'm using a DE2-70 board and a camara TRDB-5M, and the sdram controller provided for altera, basically i just modified the ofsset for the ram addresses, the rest reminds the same.

i really don't know waht to do.. i'm out of ideas! :confused:

5 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    Make sure double check your pin assigments and your clk pin to sdram too. The simple is using SGDMA.

    Sean
  • Altera_Forum's avatar
    Altera_Forum
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    hi...

    i double checked pin assigment,it seems to be correctly assigned.Since i making neighborhood inspection, using differents offset to read the sdram, my problem could be related to one of thee issues? the thing is that i dont understand the proposed solution :confused:

    problemWhy does the Scatter-Gather DMA (SG-DMA) Controller Core stall indefinitely if burst transfers are enabled?

    solution

    The SGDMA will stall indefinitely if it encounters transfer lengths which are not multiples of the burst length. This will only occur if burst transfers are enabled.

    For example if you configure the SGDMA for 32 bit transfers with a maximum burst length of 2 then you must use transfer lengths that are multiples of eight bytes to avoid this issue.

    To avoid this issue please upgrade to the Quartus II design software version 8.1 and regenerate your system in SOPC Builder.

    problem Why do I get corrupt data read results with the Scatter-Gather DMA Controller Core (SG-DMA)?

    solution

    If you enable unaligned accesses, read data can become corrupt. To avoid this you should disable unaligned accesses and only provide word aligned read addresses to the SGDMA.

    thank you
  • Altera_Forum's avatar
    Altera_Forum
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    Hi silvana,could you explain how to use ddr sdram controller .And i have a altera university program license .In megewizard i have a ddr sdram controller.Is this enough to store datas into the sdram or other wise is IP needed?

    And also i didnot have hardware .can i verify my programs of sdram controller through simulator

    please help me

    thank you
  • Altera_Forum's avatar
    Altera_Forum
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    Parva,

    I think you can run modelsim. But you must have a physical hardware to be able to run it sdram.

    Sean
  • Altera_Forum's avatar
    Altera_Forum
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    Hai silvana,thank you.

    could you guide me how to write program for ddr_sdram controller

    and how to instantiate ddr_sdram in top module?

    thank you