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AGofs's avatar
AGofs
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

Quartus II 18.1 lite edition in system memory editor

Good afternoon ,

I'm working with 18.1 lite edition with my new FPGA design.

I can program FPGA successfully, and then I'm opening InSystem Memory Editor .

JTAG ready and USB-Blaster found.

I would expect to receive a lot of InSystem Memory Editor instances ( as planned at the my design).

but I'm getting warning :"No instance found".

There not a matter of the USB-blaster or SW, because I've got InSystem Memory Editor instances at the previous FPGA design with same USB-Blaster and same SW.

Where is a problem?

10 Replies

  • sstrell's avatar
    sstrell
    Icon for Super Contributor rankSuper Contributor

    So in the IP Parameter Editor for the RAMs in your design, you've enabled ISMCE, specified a unique index name for each instance, compiled the design, and programmed the device. Have you tried programming the device from within the JTAG Configuration section of the ISMCE instead of the Quartus Programmer?

    • AGofs's avatar
      AGofs
      Icon for Occasional Contributor rankOccasional Contributor

      Good morning,

      I've tried to program my device from JTAG Configuration section of the ISME- sometimes it programs my device properly, but rarely (approximately 1 from 10 trials).

      "programs my device properly"- means I've seen rising at the current consuming.

      all another trials- any rising at the current consuming after device has been programmed.

      in addition, when I'm using an "auto-detect" option at the programmer- it also programs my device properly, but not every time (approximately 1 from 4 trials).

  • ShengN_altera's avatar
    ShengN_altera
    Icon for Super Contributor rankSuper Contributor

    Hi,


    May be power cycle the board, recompile and reprogram the board. Did another run and see.


    Thanks,

    Best Regards,

    Sheng


    • AGofs's avatar
      AGofs
      Icon for Occasional Contributor rankOccasional Contributor

      Hi Sheng,

      I've made recompiling several times- any change at the behavior of the PCB.

      you wrote:"May be power cycle the board".

      what do you mean?

  • ShengN_altera's avatar
    ShengN_altera
    Icon for Super Contributor rankSuper Contributor

    Hi,


    Have you properly timing constraint the jtag? Template can be found by go to Insert Template -> Timing Analyzer -> SDC Cookbook -> Jtag Signal Constraints.

    Or may be try to lower the programming frequency.


    Thanks,

    Best Regards,

    Sheng


    • AGofs's avatar
      AGofs
      Icon for Occasional Contributor rankOccasional Contributor

      Hi Sheng,

      I will check this issue, but I always used default constraints- and it works.

  • ShengN_altera's avatar
    ShengN_altera
    Icon for Super Contributor rankSuper Contributor

    you wrote:"May be power cycle the board".

    what do you mean?


    Turn off and on the board.


    • AGofs's avatar
      AGofs
      Icon for Occasional Contributor rankOccasional Contributor

      It doesn't improve the performance of the board.

    • AGofs's avatar
      AGofs
      Icon for Occasional Contributor rankOccasional Contributor

      you can close the case.

      thank you.