Programming of the CRAM of a Max10 using svf file

Dear Farabi

I tried that, there is no change if I set a different clock frequency (in this case 6 MHz).

I guess the code in the svf file somehow overwrites some non-volatile memory cells on the Max10.

Best,

Yves

Dear Aiman

Thanks for your reply! There is no error message, but the issue is the following:

1.) We configure the FPGA CFM using a design, let's say "led_blinky"

2.) We power-cycle the FPGA; "led_blinky" is running (as it should)

3.) We use the .svf file (see above) to configure the CRAM of the FPGA with the design "stopwatch"

4.) We observe, that the design "stopwatch" is working as expected.

5.) Now comes the surprise: Although the design "stopwatch" was only supposed to be loaded into the CRAM (so it should not affect the design "led_blinky" in CFM), our previous design "led_blinky" is not running after power cycling the FPGA. Instead, neither of the two designs are active.

This problem is therefore not solved and unlikely related to the clock frequency.

Is there anything we can try in addition?

Thanks a lot!

Best,

Yves

Dear Aiman

I apologize for my late answer! Yes, the CRAM is programmed correctly, the design "Stopwatch" runs when I program the CRAM from my .svf file. However, when I do a Verify of the CFM0 using the programmer after powercycling the device, the contents of the CFM0 has been altered. Verify on the programmer using the pof file from the old design now shows an error.

Best regards,

Yves

Dear Aiman

I apologize for the late reply. Yes, the issue is, that programming the CRAM with the svf file erases the CFM. This is not desired as it wears out the CFM over time. Here some background: We use MAX10 boards for teaching. Some students have a Mac. There is a solution for running the command line version of Quartus in a Docker container with Rosetta 2. This way we can generate the svf file for programming. Using OpenFPGALoader we can then program the CRAM. But this erases the CFM every time. The two designs we talked about before were just to demonstrate that the CFM gets erased.

Is there a way to fix the svf file so it does not erase the CFM, but just configures the CRAM?

Thanks a lot!

Best,

Yves

PS: Again, how we generate the svf file:

quartus_cpf -c -q 24.0MHz -g 3.3 -n p project_name.sof project_name.svf