Matt1
Occasional Contributor
7 years agoPFL Mega Function: Setup time Issue
hi all,
I am trying to implement Altera PFL IP (configuration is done for FPPx16) in MAX5 CPLD.
As per the datasheet i did all the constraining for the respective signals.
From the CPLD design compilation reports,the Fmax is shown only 94.21 MHz.
As per my requirement , PFL_CLK is set to 100Mhz.
The setup time issues are pointing to the internal signals in PFL IP.
Can anybody hep me in solving the issue,
Thanks in Advance.