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Matt1's avatar
Matt1
Icon for Occasional Contributor rankOccasional Contributor
7 years ago

PFL Mega Function: Setup time Issue

hi all, I am trying to implement Altera PFL IP (configuration is done for FPPx16) in MAX5 CPLD. As per the datasheet i did all the constraining for the respective signals. From the CPLD design com...
Matt1's avatar
Matt1
Icon for Occasional Contributor rankOccasional Contributor
7 years ago

thanks for the reply.

I tried with Flash Programming>Speed, but the compilation failed due to resource limitations( as the device is 5M1270z).