MAX10 DDR3 Timing

Question

Hi,I need a definitive statement regarding the timing.The two attached screenshots were created with Quartus 23.1 but can also be found in 25.1. Although adjusting the temperature range reduced the number of failing paths (see screenshot 800MHz_300MHz_DDR3_1, which ran at -40°C to 100°C), there remain parts that do not meet the timing.According to the datasheet, this should work.The MAX10 being used is a 10M16DAF484I6G, which is the fastest speed grade. The memory is Micron MT41K256M16TW-107AAT.Br,Korbinian

adzimzm_altera · Answer

Hi Korbinian,
&nbsp;
Have you create a timing constraint for those failing paths?
&nbsp;
Maybe you can refer to EMIF Handbook for the timing closure issue and optimizing timing:

https://docs.altera.com/r/aigN1Vypic5yu3QMv5nT6w/XSJlBA8TdzzSQ3qEWPUIjQ
 https://docs.altera.com/r/aigN1Vypic5yu3QMv5nT6w/FN_pWR3FgpBTqD15qLBCfQ

&nbsp;
Regards,
Adzim

adzimzm_altera · Answer

Hi Korbinian,
&nbsp;
Do you still facing the timing violation in your design?
Regards,
Adzim

kw_arrow · Answer

Hi Adzim,We are currently testing timing constraints, I will come back when we have results.Thanks,Korbinian

adzimzm_altera · Answer

Hi Korbinian,
&nbsp;
Please let me know if you have any further question or the design is working now.
&nbsp;
Regards,
Adzim

adzimzm_altera · Answer

Dear Korbinian,We will continue to monitor this post for the next 5 days. If there are no further inquiries during this period, I will step back and allow the community to assist with any future follow-up questions.Thank you for engaging with us!Regards,Adzim

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MAX10 DDR3 Timing

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