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Lakshman-Athukorala's avatar
Lakshman-Athukorala
Icon for New Contributor rankNew Contributor
6 months ago
Solved

MAX10 ADC_VREF (Single Supply Device)

I am using a MAX 10 10M08SAE144C8G device (single-supply with internal ADC). Power setup: VCCIO banks: mostly 3.3 V, one bank at 2.5 V (per datasheet, mixed voltages allowed) VCCA: 3.3 V (per dat...
Core Logic
Generic Io
Power
Programmable Logic Device
  • Lakshman-Athukorala's avatar
    Lakshman-Athukorala
    6 months ago

    Hello,

    I just realised I have tied ADC_VREF (pin 5 of my FPGA) to REFGND (pin 4 of the FPGA)! Doh!

Lakshman-Athukorala's avatar
Lakshman-Athukorala
Icon for New Contributor rankNew Contributor
6 months ago

Hello,

I just realised I have tied ADC_VREF (pin 5 of my FPGA) to REFGND (pin 4 of the FPGA)! Doh!

  • Farabi_Altera's avatar
    Farabi_Altera
    Icon for Regular Contributor rankRegular Contributor
    6 months ago

    Hello, 

     

    Noted. Good to hear you solved the issue. 

     

    regards,

    Farabi