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jAlter's avatar
jAlter
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3 months ago

MAX 10. No 3.0 V Schmitt Trigger I/O standard

For some reason Max 10 doesn't support 3.0 V Schmitt Trigger I/O standard.

Of course, using 3.3V I/O standard would work as well. But then Quartus would complain and would issue a fatal error if there other pins in the same bank are configured as 3.0 V LVTTL or 3.0 V LVCMOS.

I guess I could change all the pins in the same bank to 3.3V, instead of 3.0V. But I don't want to do that because some features are supported on 3.0V but not on 3.3V I/O standard. E.g., configurable slew rate is not available for 3.3V I/O standard.

It would seems that something doesn't make much sense. Not sure if it's a real hardware issue or just a Quartus limitation.

So the question is how I can enable both the Schmitt Trigger and features such as slew rate control in the same I/O bank. I don't need this in the same pin, at least not in this case,. Or the only workaround is to use something like 2.5V I/O standard? Didn't try, but according to the datasheet 2.5V I/O standard does support both features.

Thanks,

Programmable Logic Device

16 Replies

  • ShengN_altera's avatar
    ShengN_altera
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    3 months ago

    According to the document screenshot:

    Yes, MAX 10 don't support 3.0 V Schmitt Trigger.

    I think you can use 2.5V for both Schmitt Trigger and slew rate control.

     

  • jAlter's avatar
    jAlter
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    3 months ago

    Hi ShengN, thanks for your reply.

    ShengN_altera wrote:

    Yes, MAX 10 don't support 3.0 V Schmitt Trigger. 
    I think you can use 2.5V for both Schmitt Trigger and slew rate control.

    That's what I thought. But "lying" to Quartus about the real voltage level sounds like a pretty ugly workaround. I know that the output voltage doesn't change just because you change the Quartus I/O standard configuration. But the Timing and the Power analysis will be affected.

    Sounds to me this is more like a Quartus bug that an actual device limitation?

     

    Thanks,

     

  • jAlter's avatar
    jAlter
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    2 months ago
    ShengN_altera wrote:

    May I know which output voltage do you mean?

    Sure. I apologize if I wasn't clear enough.

    The hardware is currently working at 3.3V at that I/O bank. I could change it to 3.0V, but I cannot change it to 2.5V.

    What I meant is that I know that I could just use the 2.5V I/O standard setting in Quartus, but still leave the actual voltage at the hardware at 3.3 or 3.0V. And this would let me both enable a Schmitt Trigger and slew rate control at the same I/O bank. But this workaround, using a Quartus I/O standard setting that is different than the real hardware, has a couple of problems. One of them is that the timing and power analysis would be wrong.

    Hope it is clear now. Otherwise please let me know.

    Thanks.

    • ShengN_altera's avatar
      ShengN_altera
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      2 months ago

      If you want to use schmitt trigger and slew rate control on same IO bank, have to set VCCIO to 2.5V due to limitation. Else, have to separate them to different bank already.

      Why cannot change the IO bank voltage to 2.5V? Since can change to 3.0V already

      • jAlter's avatar
        jAlter
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        2 months ago
        ShengN_altera wrote:

        Why cannot change the IO bank voltage to 2.5V? Since can change to 3.0V already

        We cannot power this bank at 2.5V. Some external input signals will reach levels above 3.0V, and we can't easily control that. We could add some kind of voltage level shifting. But this seems overkill and an unnecessary complication just for this purpose.

        Thanks for your help anyway.

  • FvM's avatar
    FvM
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    2 months ago

    Hi,

    3.0 V input level is no problem with 2.5 V IO standard as there's no VCCIO clamp diode involved (unless explicitely enabled). Datasheet specifies recommended input voltage range -0.5..3.6 V independed of VCCIO. Vil and Vih depend of course on VCCIO, thus asymmetrical threshold can be a concern.

    Regards
    Frank

  • FvM's avatar
    FvM
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    2 months ago

    Hi,
    the missing link between above quoted datasheet table 8 (recommended Vi = -0.5 .. 3.6 V) and table 20 (Vih,max = Vccio + 0.3V) is the fact, that PCI clamp diodes are enabled in Quartus software for most IO standards by default.

    You have to decide if your circuit involves possible input overshoot so that PCI clamp diodes must stay enabled to protect the FPGA or if they can be explicitely disabled.