How generate .SOF

Hi Daisxiwen

I bought a license and now i can generate a limited_time .SOF file.

Thank you for your guid

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Yes this is mean, I thought that you would at least have a time limited sof with the 30-days evaluation... I guess your only option is to buy the license then.

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This is the problem that i don't understand really, because last year i use stratix II and when i generate my project, appear to me time limited sof.

But Now never poster this time limited.

In the attached file there are a screen, that's confirm to me as you say, i have just only solution that i buy a license. Il bought this in the came 10 days.

Think you very much for your followed for my problem.

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Yes, for the Stratix IV you will need a subscription edition with a license. Before buying it, you can download the subscription edition and try it for 30 days, so you'll see if it solves your problem before buying anything.

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Now i use the subscription edition, that's mean, i occured this problem in subscription edition evaluation(30 days).

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What FPGA are you compiling for? Some of them (ex: Stratix) require a subscription edition of Quartus.

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I use Stratix IV GX, EP4SGX230KF40C2, i need just confirmation from you, when i buy a license, my problem will be resolved, and also will resolved the second major problem for me that is " i have a program that is running on my processor. This program takes about the same amount of time whether the system clock is one frequency or a faster frequency.", i note that the second problem is mentionned in this threads http://www.alteraforum.com/forum/showthread.php?t=31248&page=2.

Please reply to this to buy a license.

Think you.

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If you look in the assembler report and click on "generated files" you'll see all the files created by the assembler and their location.

To check/change the path the files are generated in, go to the Assignments menu, Settings, Compilation Process Settings, and in the window, check box "Save project output files in specified directory"

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Yes you have a reason, when i try to check the assembler report, i find a warning "Can't generate a programming file because you use evaluation version of Quartus II".

If you look in the assembler report and click on "generated files" you'll see all the files created by the assembler and their location.

To check/change the path the files are generated in, go to the Assignments menu, Settings, Compilation Process Settings, and in the window, check box "Save project output files in specified directory"

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If you are targeting an "Advanced" or "Initial Device" for the version of quartus, you can not generate the SOF file. For version 11.0 this is usually the Stratix V at this point.

If you really need the device support, (IE you have devices in house). Either upgrade to the latest version of quartus, or contact your rep to see if you can get pre-release patch to turn on SOF generation for the family you are targeting..

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Think you a lot for your reply,

I use Quartus 9.1 because this version it given by the board that's a bought directly from the site of Altera.

I don't know really how i will travel with this board because i met many problem, for example that's i write in this thread http://www.alteraforum.com/forum/showthread.php?p=126717&posted=1#post126717, and when i start to release my SOPC from the begening i find this problem, really it is shocking for me.

Ok, my friend can you help me how can i do to abtained the pre-release patch to turn on SOF generation?

Thanks :)