Forum Discussion
New ContributorBoundary scan access to SDM pins on Agilex 7
In the Agilex 7 BSDL files available from the Altera website, all of the SDM pins are marked as 'Linkage' indicating that there is no boundary access or control of them. However, from some early investigations on the DK-SI-AGF014EB Development Kit it seems that boundary scan can be used to read and control at least some of these signals (so far I’ve tried SDM_IO5, SDM_IO7, and SDM_IO9).
Please can you clarify why this functionality isn't included in the supplied BSDL files, and whether there is a way to obtain BSDL files which include this information?
3 Replies
Rob_XJTAG_ASAPThank you for clarifying this. As an ASAP partner which specialises in JTAG and boundary scan, is there a way for us to obtain access to complete BSDL files that include all possible access to all pins?
We're aware that in some configurations some of the pins might not function as described in these BSDL files, but we can handle this in our tools and our experience so far is that the public BSDL files are unnecessarily limiting what can be done via boundary scan.
FakhrulA_alteraRegular Contributor
Hi,
Thanks for the clarification. The observed behavior is consistent with the Agilex 7 implementation.
The SDM_IO pins do have boundary-scan circuitry, but the public BSDL intentionally defines them as Linkage. These pins are multifunction configuration pins, and their behavior depends on the device configuration and power-up mode, including MSEL sampling. Therefore, general-purpose boundary-scan tools do not treat them as ordinary controllable or observable user I/O.
The public BSDL files are not intended to describe every possible SDM access mode. I could not find a documented public or ASAP-specific “complete” BSDL file that exposes all SDM pin functions. The post-configuration BSDL generator should not be treated as a way to create such an all-access SDM model.
If you need to use SDM_IO5, SDM_IO7, or SDM_IO9 in a boundary-scan tool, please provide Altera with the exact device and package, MSEL setting, configuration state, and intended test operation. Altera can then confirm whether a supported device-specific model or test procedure is available. I would not recommend changing Linkage to In or Out in the public BSDL without that validation.
regards,
Fakhrul
Ash_R_AlteraHi,
The SDM_IO pins are implemented with boundary-scan circuitry in Agilex 7 devices. However, the standard public BSDL models classify the SDM pins as Linkage, so general-purpose customer boundary-scan tools do not treat them as controllable or observable cells. This is intentional because these pins have configuration-specific behavior, including MSEL sampling during power-up, and are not released in the public BSDL as ordinary user I/O.
Your observation on SDM_IO5, SDM_IO7, and SDM_IO9 is consistent with the underlying SDM boundary-scan implementation.
Regards,
Altera Tech Support
