Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

How generate .SOF

Hi, I construct new project, and i created new SOPC. After i generate the design. Second i make the assignement pins for the IP. When i passed to download the program after the compilation...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

--- Quote Start ---

What FPGA are you compiling for? Some of them (ex: Stratix) require a subscription edition of Quartus.

--- Quote End ---

I use Stratix IV GX, EP4SGX230KF40C2, i need just confirmation from you, when i buy a license, my problem will be resolved, and also will resolved the second major problem for me that is " i have a program that is running on my processor. This program takes about the same amount of time whether the system clock is one frequency or a faster frequency.", i note that the second problem is mentionned in this threads http://www.alteraforum.com/forum/showthread.php?t=31248&page=2.

Please reply to this to buy a license.

Think you.