Honored ContributorI found it from the manual, doed that mean we can't apply both the flash and sdram device in SOPC builder? If no, how to deal with it?
my board is CYCLONE II EP2C35F672C6 Thanks for any replies!
Honored Contributoryou need a tri-state bridge, try taking a look at the example designs.
Honored ContributorI have to correct that :there are FLASH and LAN91C111 device, both of which share the same FPGA pin. So when I apply them in SOPC builder, I can't assign pin location for the pin which share the same pin in FPGA.
Honored Contributori'm not sure about that. are you using the DE2 kit? have you taken a look at the designs to see if they use both devices in the same design?
Honored ContributorI am using Nios development kit,CycloneII. I have not found any Nios designs available on the this board. Or anyone know that?
How many memories will the UcosII and Nichestack TCP/IP use in the NiosII design? The flash only have 16Mb, it'll be encoutered elf file error when loading the Software program onto the hardware plateform/Honored ContributorHave you installed Nios II EDS? If not, you should install it. Most of the reference designs can be found at <Nios II EDS installation path>\examples folder. For example, if you are using Quartus II/Nios II EDS v9.1 and Nios II Development KIt (Cyclone II Edition - EP2C35), then the relevant designs (in Verilog) should be available at C:\Altera\91\nios2eds\examples\verilog\niosII_cycloneII_2c35 (assuming Nios II EDS has been installed to path C:\Altera\91.
You should be able to find the basic reference designs here. Start with those and modify them to suite your needs. This will also help you get the idea about the usage of shared memory chips, etc. Cheers -BDHonored ContributorThanks all, especially BD. That helps me a lot.
Now I am wondering why sometimes I need to assign address assignment for LAN91C111 and sometimes not. Of course ,the case is different ,what I want to know is what's it depending on.
